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Wed, 27 May 2026 02:54:39 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-841d70f17cbsm1809325b3a.45.2026.05.27.02.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 02:54:38 -0700 (PDT) From: Mukesh Ojha To: Thomas Gleixner Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Mukesh Ojha , Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v2 3/4] irqchip/qcom-pdc: Add PDC_VERSION() macro to describe version register fields Date: Wed, 27 May 2026 15:24:25 +0530 Message-ID: <20260527095426.2324504-4-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260527095426.2324504-1-mukesh.ojha@oss.qualcomm.com> References: <20260527095426.2324504-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=MoJiLWae c=1 sm=1 tr=0 ts=6a16bf60 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=VeW31bOOL8eyMvC__NIA:9 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI3MDA5NSBTYWx0ZWRfX6kqtaG3t92FO V32R97pd771Uc4A2orlqZt27yV/wivW+nV/uwSUfn33BabRYs7IlPmERyl7YRhTaQ9X48tI6OAd DBGye3rs969BRfs7QW7upS2fsKkPiHv+nDQ6weKOD5qtsPOfmZV/c1gX8A5YhoFSGifZbzrdDyz cyqBQ1Q55NZvSvOMrgA9BpyPg42AQdtf3LAO4n+MQkqAzamoxjZeI66ftRPa/GGRdYouRp/VsZM ucjj3cEDlKFBJ1umY8cGtChr/KHz4pBlIZDY5cPZJ3ueFCb6pHxP8n6p22zHyS0f82C05sxBCFg Gi/gEBF6XUmb5rp0f6qMpI94lznrP+gyORI+mPnTTox6OE5ybiIqMKOJPgnAU5w5i45dzJzmEtW rO/mu3W+wyCKq57O6GNqwl3dYQrvENwD5qvwe0ELx6jxIREbqpbx4vMAzZIch79ZcbJ+A+ctJFq KDyTQwAC/qo22O37vBA== X-Proofpoint-GUID: zSCo6deT9ueBNhzKtvTHjOC7Ec0uBOo0 X-Proofpoint-ORIG-GUID: zSCo6deT9ueBNhzKtvTHjOC7Ec0uBOo0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-27_01,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605270095 The PDC hardware version register encodes major, minor and step fields in byte-sized fields at bits [23:16], [15:8] and [7:0] respectively. The existing PDC_VERSION_3_2 constant was a bare magic number (0x30200) with no indication of this encoding. Add GENMASK-based field definitions for each sub-field and a PDC_VERSION(maj, min, step) constructor macro using FIELD_PREP, making the encoding self-documenting. Replace the magic constant with PDC_VERSION(3, 2, 0). Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Mukesh Ojha --- drivers/irqchip/qcom-pdc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 21e2b4b884ee..9ad2c22342e1 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -3,6 +3,7 @@ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -34,9 +35,16 @@ #define IRQ_i_CFG_TYPE_MASK GENMASK(2, 0) #define PDC_VERSION_REG 0x1000 +#define PDC_VERSION_MAJOR GENMASK(23, 16) +#define PDC_VERSION_MINOR GENMASK(15, 8) +#define PDC_VERSION_STEP GENMASK(7, 0) +#define PDC_VERSION(maj, min, step) \ + (FIELD_PREP(PDC_VERSION_MAJOR, (maj)) | \ + FIELD_PREP(PDC_VERSION_MINOR, (min)) | \ + FIELD_PREP(PDC_VERSION_STEP, (step))) /* Notable PDC versions */ -#define PDC_VERSION_3_2 0x30200 +#define PDC_VERSION_3_2 PDC_VERSION(3, 2, 0) struct pdc_pin_region { u32 pin_base; -- 2.53.0