From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D43123E63AE for ; Wed, 27 May 2026 09:54:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779875685; cv=none; b=Z/IWdA++5M+DOOBpdWuQFs0mCuxpAgv6/4QxjwuDuVXPpG0anbjH19YC6iHhMSkTmHBWWsQ2sIEfZnOy8Ms6N4hAA3zhK3Wh+SHgFVQ8cM1tAA6CR1JArjTnHJA4Plxe9TgO6i1m5Yw5cDVyuN+M+IFbCErkMWqTc6HiyjMaDAA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779875685; c=relaxed/simple; bh=MR5+An37NAd15ML4waOaMY4k6XsZAofvxnc3GU1VTNQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qr5zcHElDuHAgu8NE3aSt4mTOyg081iP31VGmbro6NAWTSYSVKGkSwjKvB+LVBeieGMyaCfTh3YToFrKCDClkP/oehm0HKtiTH63tPtwPH4Yop8k9SOGwOYbe2SXvuXTnaJ98sMbnt0WYIrg+G9iu0s0um8qWAKb19ku+tDJmrk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=CnMwfJyi; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=MY+oSgbY; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="CnMwfJyi"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="MY+oSgbY" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64R8mesK2152954 for ; Wed, 27 May 2026 09:54:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=DGSuk3sdODr y297GMVF67FBYcsj9yvQAHtFTmxGI/58=; b=CnMwfJyintEcikEBZ5uC853mvo7 4emj9GXoKDQl07jjKdmipJIiDmDGeLX6Wx+kaLcXa/2ithobn3AzafEZ9PcPSypo 8ef3bt6huCCEur0qoI0Zc1XH96BsBu7rUoZO7RYXKFWP4wtbgOz2pPm/41T93l3C wj4ocAoLyXNVcYa9StbvFZ8x7OybxlTfsedm5nTi0Dj+lrXrNVqj89DXGZwtic7w UHBFGBP+sAni+uxM5NsiP7gG1IMQU9nTNXdpmGYRdLm2RmRpK6++y3vikt/W5+uW 7mYsxvkbQT5BBK+aSMPOj1ZfDQw/UG8LYDvRVJ7oSrMo0Frk1eU0V7M94Kw== Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4edu6rgunb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 27 May 2026 09:54:43 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-c854c4b740cso817406a12.1 for ; Wed, 27 May 2026 02:54:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779875682; x=1780480482; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DGSuk3sdODry297GMVF67FBYcsj9yvQAHtFTmxGI/58=; b=MY+oSgbYQv/TIie/dkv/UrKlmciKsrNxMXxShK3/4Q7m+Chwp6p0b/JLLMmOcVIlEx cj6II6jRbX2CP+p9xM20L1erWeQlhA0ObnVPZujuqjyRT7COOD6vHDTrPJVHvqCyXSaZ X7Dz/oQyrZZ63RvrrwXt8ALMnWIfPTkRiGu6w+IFlgks4Rjcfn66krgkfQ3xckl9ZjX1 dsWdz/LLfjd2E4yK/LrtseVt0gZNweiIVnYD2aAHvp4rDOpr4nE43lWJnsrXYwo+i4fL 3DGWKKn9x4p9Xz6Dq9VDN8jjUc57fhjBzWzSiMYDsGQutvArmgpkGh6QohU6Ow9ioiTn L7XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779875682; x=1780480482; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=DGSuk3sdODry297GMVF67FBYcsj9yvQAHtFTmxGI/58=; b=NWdSgzc+YijJ+K44DSC0q9mVOCLI1EA0w27sNKq9C7g9ayRkpGWkB0738ba77WGqzU eO/jz1M/ItB77jy0O7tRHNMQHwpIP8MIJu6FTNySlSqc0Nhw6Mvc3Ti48vSONcV1bBPd L/gMbFJ2a5igmyZahnEK7Pyb2n1JR2pdTh/JIRCGWVDMQcRucXy7MD/A142GXFqm5QVX bFxoQ8kFsdc8C+xr9RpTb5OQ7TjrkZhALo6NpXuPogJ2ka6DRbC4wO6+R5ZgCeoaRgRi Eoraedki6PHMoy9GwKhQHnq4Z0uxaDGoxuerxSb6znDuyFDkZ//VWJYrK0TqaVfECvik JUHA== X-Forwarded-Encrypted: i=1; AFNElJ/aDbGHB5rAUBrgil4qZdDE8UDrzEv3Ab+pCwrVuvmLynisZMDns55eGQL4wzrMGk22HjhbTcrSopgnyPo=@vger.kernel.org X-Gm-Message-State: AOJu0YytUVFhef2SbMgG9krgFyhNmy8cnDgoVvGz4+P/Yy0aIAROAvPR KQjUFTaGQUGYocXOhmBp9g4Jj6xkRbBtFn96VoMQlGo6sMVghy3gJ6Hss+JaXziCOCW/iJrTGix aGA94d42x5zibaEgk4Cph1752xrmjbpYt1jXp/8jsk6e+3+p3iKbhAEmI813ZosbL2kU= X-Gm-Gg: Acq92OE4u0bdgZrDBPN4rIVftrg6UEI+qgTnBkw4o/+5SJb8wwzeB7z/cm1rdqzWBah EXAPlbXUzaIjHiafWLuYRYvhsTJgFBn6NeFyqw66nBprsE8Jk0bef/E6ShfKQ6QyAmI7k3Cpl8U 96eaPSk+Wsl24R2PNGoFEqyvLfA59HaL5MH/0XvCKlFcMezbfSXdvrBAgW7G7bAZwPRRavxXn5X uHPHNFGHxcOpLW8KYMEDt0wNRMLwcy/K+NAY4m8nMQbRmX6ZT8846uM2u/mZhtoxnTNqpBC8IPG klR5YpX5Iun4PYgwr9UiadFHvKnj+JJ2OctS2ntPiUVkAJ0FmOnqLem2ZDne/Z4tPwvmNBeSXRi iNZCjbfJez+Ko63G+k4CQ4sGrklHulwizf89Xdi4Njq5D2Bd4 X-Received: by 2002:a05:6a00:368d:b0:835:3949:3c1f with SMTP id d2e1a72fcca58-8415f32e062mr21497451b3a.24.1779875682393; Wed, 27 May 2026 02:54:42 -0700 (PDT) X-Received: by 2002:a05:6a00:368d:b0:835:3949:3c1f with SMTP id d2e1a72fcca58-8415f32e062mr21497420b3a.24.1779875681753; Wed, 27 May 2026 02:54:41 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-841d70f17cbsm1809325b3a.45.2026.05.27.02.54.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 02:54:41 -0700 (PDT) From: Mukesh Ojha To: Thomas Gleixner Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Mukesh Ojha , Konrad Dybcio Subject: [PATCH v2 4/4] irqchip/qcom-pdc: Use FIELD_GET() to extract bank index and bit position Date: Wed, 27 May 2026 15:24:26 +0530 Message-ID: <20260527095426.2324504-5-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260527095426.2324504-1-mukesh.ojha@oss.qualcomm.com> References: <20260527095426.2324504-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=MoJiLWae c=1 sm=1 tr=0 ts=6a16bf63 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=gWzRgU6ezm2PVdN6AcUA:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI3MDA5NSBTYWx0ZWRfX/C1otE+qWgpC b9dtjGhTnWVnFZ3YLf7bOWHg1A+Q3QRyjWV1rQNPWBbhUW2Jsk9ha5VFLxn0ny0YjP0PI5oamA4 mxXFeGAFQcAlwuYKiBK2AP1NDj2i3m7ZSg3jaCpVOCNda6bnAc4fvqekgE/BWYhHYUQ0ioeiXVe CmOPBEPkIH6kgjpWxaaD05Vl6AtSxDM0Od246t1VwEpWzyt1USliXdFIUrONTjbQdBx85qADCBW jobVeQVn+aDNjc7A3oGAzTMlpgjC6YLZZEiUroqfY/ExwFg7RfnfibumU2pHpTyua6R0lM5xgTe 8H7mvdD6xC/S+a4U/si96qBJ+HVH+6p3KWBw5TjqWVuX/H38M69tEdgSd1JRS9DYwreGwB7MpfD kInCAIJ6qi5YDvButpfNCz7KNJtyO7bxCSk7WsIiBOzbEbXzFywprJp3Egxu6CEC+I9QSnP1t+p SvKWfIo+ZlYZYnfHWsg== X-Proofpoint-GUID: 21QqCodCFnIyatVwHjp2QjTAEYqypjwx X-Proofpoint-ORIG-GUID: 21QqCodCFnIyatVwHjp2QjTAEYqypjwx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-27_01,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605270095 The IRQ_ENABLE_BANK register is a bank of 32-bit words where each bit represents one PDC pin. The bank index and bit position within the bank are encoded in the flat pin number as bits [31:5] and [4:0] respectively. Replace the open-coded division and modulo with FIELD_GET() and GENMASK() to make the bit extraction self-documenting and consistent with the FIELD_PREP() style already used in the PDC_VERSION() macro. Reviewed-by: Konrad Dybcio Signed-off-by: Mukesh Ojha --- drivers/irqchip/qcom-pdc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 9ad2c22342e1..17ca26d66fea 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -27,6 +27,8 @@ /* Valid only on HW version < 3.2 */ #define IRQ_ENABLE_BANK 0x10 #define IRQ_ENABLE_BANK_MAX (IRQ_ENABLE_BANK + BITS_TO_BYTES(PDC_MAX_GPIO_IRQS)) +#define IRQ_ENABLE_BANK_INDEX_MASK GENMASK(31, 5) +#define IRQ_ENABLE_BANK_BIT_MASK GENMASK(4, 0) #define IRQ_i_CFG 0x110 /* Valid only on HW version >= 3.2 */ @@ -110,8 +112,8 @@ static void pdc_enable_intr_bank(int pin_out, bool on) unsigned long enable; u32 index, mask; - index = pin_out / 32; - mask = pin_out % 32; + index = FIELD_GET(IRQ_ENABLE_BANK_INDEX_MASK, pin_out); + mask = FIELD_GET(IRQ_ENABLE_BANK_BIT_MASK, pin_out); enable = pdc_reg_read(IRQ_ENABLE_BANK, index); __assign_bit(mask, &enable, on); -- 2.53.0