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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id af79cd13be357-914f86fffddsm755148485a.12.2026.05.28.03.40.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 03:40:35 -0700 (PDT) From: Yongxing Mou Subject: [PATCH v5 00/15] drm/msm/dp: Prerequisite cleanup for upcoming MST support Date: Thu, 28 May 2026 18:40:21 +0800 Message-Id: <20260528-dp_mstclean-v5-0-a9221c1f1f3b@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAJYbGGoC/yXMWwrDIBCF4a2Eea5g1IwmWymhmMnYCs2lmpZCy N4rzeN34Pw7ZE6RM3TVDok/McdlLmguFdDDz3cWcSwGJRXKRjkxrrcpb/RkP4sgW0PsHXlloDz WxCF+/7Vrfzrx612i2znC4DMLWqYpbl3FdrRScm1abRhdcKi1owZrSUF5tmhbNyBq6I/jB8ORl tepAAAA X-Change-ID: 20260528-dp_mstclean-f094cea8ca24 To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yongxing Mou , Abhinav Kumar , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779964831; l=3056; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=xuue7tlOaj84hkqTXFUwbQubbONow4b2zdH/SbNbEeM=; b=6AiqXsyN5m/pRFuE6vEOjwSl9kyRI5HWtBsC2kxqIl+6AhBydbz8qrD5s+3//lYJ60EHHGIs8 ENBqHg++ChIAoq6GcqIHHCzKaveamV6dH498RDeNsvY4oOWsGXgw7jQ X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI4MDEwNiBTYWx0ZWRfX0G8u42o0Yooe jkzCsLMDgGMvUsIkQ9dxJcMqoHkeAUrp4e16VvHkjo+E9TaWAV3dT5c2EBUQFimN4lQ4IWLMCW3 tYXb3VZBadWmeiJ1PkGP8AZVv4sG7t7MjzLVm19f7J0bYK7p8rlH4mmQKGl5GZ7A8Hg7n6gjJlG kxMQL8N7f+QEDzWAzVeNlmwjjINvoH1baHVRN7sOOw9+jjzNER6uyfsFY98/kTzxUU3eANBSbGA hvjus1mc6mmhZjBOKmI4HqeOnaxWcW+vBfYXiuplkXsesKyJJIyFG4rlijQpD02J5CiTJeufkzP NAnGeuyCdCZX2lsADsjTRjev+kHL/it/XwLi3jyf4MZhtGIHBMVO7YbJRwKOGZSrYcdNVU3i5rj hjcwZHCBd2T2xOd66P27jAra54KHw0eHLR5gdAAKZYu85649fFoBscwONGtO7IhqUcc+feqh6ib udkyAPmT/kHEXTGL/fw== X-Proofpoint-ORIG-GUID: s8vsGaTyAq1FxPX_tYHPWSp95YCImz5T X-Proofpoint-GUID: s8vsGaTyAq1FxPX_tYHPWSp95YCImz5T X-Authority-Analysis: v=2.4 cv=EdL4hvmC c=1 sm=1 tr=0 ts=6a181ba5 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=IAIk9fEXjUNtIRNVmKEA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-28_03,2026-05-26_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 phishscore=0 clxscore=1015 bulkscore=0 spamscore=0 adultscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2605280106 This series is the SST-only prerequisite portion of the MSM DP MST work. It refactors the existing DP code paths so that MST can plug in cleanly in a follow-up series, without bundling the cleanup with MST functionality in the same submission. SST behaviour is preserved end-to-end; no new functionality is added here. The intent is to land these refactors first to keep the follow-up MST series focused, smaller, and easier to review. Changes in v5: - Split out from v4: only the SST prerequisite cleanup (patches 1-15) is sent here; the MST implementation will follow on top. - Rebased onto linux-next-20260527; adapted bridge callbacks to the new drm_atomic_commit* API. - patch 3: added Suggested-by: Dmitry Baryshkov. - patch 4: fixed "splite" typo, reworded body, added RMW comment covering both SST and MST paths. [Dmitry] - patch 10: drop cached panel from msm_dp_ctrl_private; pass panel explicitly to all stream-related dp_ctrl APIs. [Dmitry] - patch 13/14: introduce bridge wrappers and atomic_prepare with drm_atomic_commit* from the start to preserve bisectability. - patch 15: fixed pass panel inside the func. [Dmitry] - Link to v4: https://lore.kernel.org/all/20260410-msm-dp-mst-v4-0-b20518dea8de@oss.qualcomm.com/ Signed-off-by: Yongxing Mou --- Abhinav Kumar (6): drm/msm/dp: break up dp_display_enable into two parts drm/msm/dp: re-arrange dp_display_disable() into functional parts drm/msm/dp: allow dp_ctrl stream APIs to use any panel passed to it drm/msm/dp: split dp_ctrl_off() into stream and link parts drm/msm/dp: make bridge helpers use dp_display to allow re-use drm/msm/dp: separate dp_display_prepare() into its own API Yongxing Mou (9): drm/msm/dp: remove cached drm_edid from panel drm/msm/dp: drop deprecated .mode_set() and use .atomic_enable drm/msm/dp: move mode setup into msm_dp_panel_init_panel_info() drm/msm/dp: split msm_dp_ctrl_config_ctrl() into link parts and stream parts drm/msm/dp: extract MISC1_MISC0 configuration into a separate function drm/msm/dp: split link setup from source params drm/msm/dp: move the pixel clock control to its own API drm/msm/dp: simplify link and clock disable sequence drm/msm/dp: pass panel to display enable/disable helpers drivers/gpu/drm/msm/dp/dp_ctrl.c | 384 ++++++++++++++++++++---------------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 30 ++- drivers/gpu/drm/msm/dp/dp_display.c | 273 ++++++++++++------------- drivers/gpu/drm/msm/dp/dp_display.h | 8 + drivers/gpu/drm/msm/dp/dp_drm.c | 43 +++- drivers/gpu/drm/msm/dp/dp_drm.h | 12 -- drivers/gpu/drm/msm/dp/dp_panel.c | 75 ++----- drivers/gpu/drm/msm/dp/dp_panel.h | 17 +- 8 files changed, 453 insertions(+), 389 deletions(-) --- base-commit: e7d700e14934e68f86338c5610cf2ae76798b663 change-id: 20260528-dp_mstclean-f094cea8ca24 Best regards, -- Yongxing Mou