From: Max Lee <max.lee@canonical.com>
To: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
acelan.kao@canonical.com, Max Lee <max.lee@canonical.com>
Subject: [PATCH] PCI: Mask Replay Timer Timeout for Realtek RTS525A
Date: Thu, 28 May 2026 11:23:47 +0800 [thread overview]
Message-ID: <20260528032347.644365-1-max.lee@canonical.com> (raw)
The Realtek RTS525A PCI-Express SD card reader (10ec:525a) generates
excessive Correctable Error (Replay Timer Timeout) AER events during
PCIe link initialization. On systems where firmware enables AER
reporting (CERptEn+), this causes an AER storm of ~240K error events
within 11 seconds of boot, overwhelming the kernel's error handler and
blocking shutdown/reboot.
The root cause is a transient link training instability inherent to this
device -- even on BIOS versions that suppress reporting, the error
status register (CESta) shows Timeout+ set.
Unlike the GL9750/GL9755 fixup (which only masks the parent root port),
the RTS525A additionally requires masking the endpoint's own Correctable
Error Mask register bit 12 (PCI_ERR_COR_REP_TIMER) to prevent it from
sending ERR_COR messages upstream. Call pci_mask_replay_timer_timeout()
to mask the parent root port as well.
Signed-off-by: Max Lee <max.lee@canonical.com>
---
drivers/pci/quirks.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index caaed1a01dc0..072d1456daad 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -6380,4 +6380,23 @@ static void pci_mask_replay_timer_timeout(struct pci_dev *pdev)
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_timeout);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_timeout);
+
+static void pci_mask_replay_timer_timeout_on_endpoint(struct pci_dev *pdev)
+{
+ u32 val;
+
+ if (!pdev->aer_cap)
+ return;
+
+ pci_info(pdev, "mask Replay Timer Timeout on endpoint due to hardware defect\n");
+
+ pci_read_config_dword(pdev, pdev->aer_cap + PCI_ERR_COR_MASK, &val);
+ val |= PCI_ERR_COR_REP_TIMER;
+ pci_write_config_dword(pdev, pdev->aer_cap + PCI_ERR_COR_MASK, val);
+
+ /* Also mask the parent root port */
+ pci_mask_replay_timer_timeout(pdev);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REALTEK, 0x525a,
+ pci_mask_replay_timer_timeout_on_endpoint);
#endif
--
2.43.0
next reply other threads:[~2026-05-28 3:30 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 3:23 Max Lee [this message]
2026-06-10 2:47 ` [PATCH v2] " Max Lee
2026-07-01 6:27 ` Manivannan Sadhasivam
2026-07-01 20:42 ` Bjorn Helgaas
2026-07-02 5:10 ` Lukas Wunner
2026-07-02 7:06 ` Max Lee
2026-07-02 14:42 ` Lukas Wunner
2026-07-06 2:34 ` Max Lee
2026-07-02 8:08 ` Manivannan Sadhasivam
2026-07-06 2:53 ` [PATCH v3] PCI: Disable ASPM L0s " Max Lee
2026-07-06 9:41 ` Lukas Wunner
2026-07-06 10:20 ` Manivannan Sadhasivam
2026-08-07 8:07 ` Lukas Wunner
2026-08-11 5:33 ` Manivannan Sadhasivam
2026-07-07 2:15 ` [PATCH v4] " Max Lee
2026-08-11 9:39 ` Bjorn Helgaas
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