mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
	<joro@8bytes.org>, <jgg@nvidia.com>
Cc: <yi.l.liu@intel.com>, <kevin.tian@intel.com>,
	<nicolinc@nvidia.com>, <vasant.hegde@amd.com>,
	<jon.grimm@amd.com>, <santosh.shukla@amd.com>,
	<sairaj.arunkodilkar@amd.com>, <jay.chen@amd.com>,
	<wvw@google.com>, <wnliu@google.com>, <dantuluris@google.com>,
	<chriscli@google.com>, <kpsingh@google.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Vasant Hegde <Vasant.Hegde@amd.com>
Subject: [PATCH v2 07/26] iommu/amd: Add support for AMD vIOMMU VF MMIO region
Date: Thu, 28 May 2026 05:17:19 +0000	[thread overview]
Message-ID: <20260528051738.596013-8-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20260528051738.596013-1-suravee.suthikulpanit@amd.com>

The AMD vIOMMU virtualizes guest MMIO registers at the 3rd 4K region.
This is achieved using the iommufd_viommu_alloc_mmap().

Co-developed-by: Vasant Hegde <Vasant.Hegde@amd.com>
Signed-off-by: Vasant Hegde <Vasant.Hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 drivers/iommu/amd/amd_iommu_types.h |  3 +++
 drivers/iommu/amd/amd_viommu.h      |  7 +++++++
 drivers/iommu/amd/iommufd.c         | 18 +++++++++++++++++-
 drivers/iommu/amd/viommu.c          | 11 +++++++++++
 include/uapi/linux/iommufd.h        |  2 ++
 5 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index e88e0bacd1a9..cc7049bbfa14 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -540,6 +540,9 @@ struct amd_iommu_viommu {
 	 * Indexed by guest domain ID.
 	 */
 	struct xarray gdomid_array;
+
+	/* Offset for mmap() of guest VF MMIO; set after iommufd_viommu_alloc_mmap(). */
+	unsigned long vfmmio_mmap_offset;
 };
 
 /*
diff --git a/drivers/iommu/amd/amd_viommu.h b/drivers/iommu/amd/amd_viommu.h
index d0c4fdd00809..447692b9101c 100644
--- a/drivers/iommu/amd/amd_viommu.h
+++ b/drivers/iommu/amd/amd_viommu.h
@@ -12,6 +12,8 @@ int amd_viommu_init(struct amd_iommu *iommu);
 
 void __init amd_viommu_uninit(struct amd_iommu *iommu);
 
+u64 amd_viommu_get_vfmmio_addr(struct amd_iommu *iommu, u16 gid);
+
 #else
 
 static inline int amd_viommu_init(struct amd_iommu *iommu)
@@ -23,6 +25,11 @@ static inline void amd_viommu_uninit(struct amd_iommu *iommu)
 {
 }
 
+static inline u64 amd_viommu_get_vfmmio_addr(struct amd_iommu *iommu, u16 gid)
+{
+	return 0;
+}
+
 #endif /* CONFIG_AMD_IOMMU_IOMMUFD */
 
 #endif /* AMD_VIOMMU_H */
diff --git a/drivers/iommu/amd/iommufd.c b/drivers/iommu/amd/iommufd.c
index 785fa2d575f2..34524c1309c3 100644
--- a/drivers/iommu/amd/iommufd.c
+++ b/drivers/iommu/amd/iommufd.c
@@ -7,6 +7,7 @@
 
 #include "iommufd.h"
 #include "amd_iommu.h"
+#include "amd_viommu.h"
 #include "amd_iommu_types.h"
 
 static const struct iommufd_viommu_ops amd_viommu_ops;
@@ -44,11 +45,12 @@ int amd_iommufd_viommu_init(struct iommufd_viommu *viommu, struct iommu_domain *
 			    const struct iommu_user_data *user_data)
 {
 	int ret;
+	phys_addr_t page_base;
 	unsigned long flags;
 	struct iommu_viommu_amd data;
 	struct protection_domain *pdom = to_pdomain(parent);
-	struct amd_iommu_viommu *aviommu = container_of(viommu, struct amd_iommu_viommu, core);
 	struct amd_iommu *iommu = container_of(viommu->iommu_dev, struct amd_iommu, iommu);
+	struct amd_iommu_viommu *aviommu = container_of(viommu, struct amd_iommu_viommu, core);
 
 	xa_init_flags(&aviommu->gdomid_array, XA_FLAGS_ALLOC1);
 	aviommu->parent = pdom;
@@ -68,6 +70,16 @@ int amd_iommufd_viommu_init(struct iommufd_viommu *viommu, struct iommu_domain *
 	aviommu->gid = ret;
 	pr_debug("%s: gid=%#x", __func__, aviommu->gid);
 
+	page_base = amd_viommu_get_vfmmio_addr(iommu, aviommu->gid);
+
+	ret = iommufd_viommu_alloc_mmap(&aviommu->core,
+					page_base, SZ_4K,
+					(unsigned long *)&data.out_vfmmio_mmap_offset);
+	if (ret)
+		goto err_mmap;
+
+	aviommu->vfmmio_mmap_offset = data.out_vfmmio_mmap_offset;
+
 	ret = iommu_copy_struct_to_user(user_data, &data,
 					IOMMU_VIOMMU_TYPE_AMD,
 					reserved);
@@ -82,6 +94,8 @@ int amd_iommufd_viommu_init(struct iommufd_viommu *viommu, struct iommu_domain *
 
 	return 0;
 err_init:
+	iommufd_viommu_destroy_mmap(&aviommu->core, aviommu->vfmmio_mmap_offset);
+err_mmap:
 	amd_iommu_gid_free(iommu, aviommu->gid);
 err_gid:
 	return ret;
@@ -100,6 +114,8 @@ static void amd_iommufd_viommu_destroy(struct iommufd_viommu *viommu)
 	list_del(&aviommu->pdom_list);
 	spin_unlock_irqrestore(&pdom->lock, flags);
 	xa_destroy(&aviommu->gdomid_array);
+	if (aviommu->vfmmio_mmap_offset)
+		iommufd_viommu_destroy_mmap(&aviommu->core, aviommu->vfmmio_mmap_offset);
 	amd_iommu_gid_free(iommu, aviommu->gid);
 }
 
diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
index 014ae16bf58b..9e6eb2f977ec 100644
--- a/drivers/iommu/amd/viommu.c
+++ b/drivers/iommu/amd/viommu.c
@@ -131,6 +131,17 @@ static int __init viommu_vf_vfcntl_init(struct amd_iommu *iommu)
 	return -ENOMEM;
 }
 
+/*
+ * Returns VF MMIO BAR offset for the give guest ID which will be
+ * mapped to guest vIOMMU 3rd 4K MMIO address
+ */
+u64 amd_viommu_get_vfmmio_addr(struct amd_iommu *iommu, u16 gid)
+{
+	/* TODO: Add check for sVIOMMU and set gid[bit 15] */
+	return iommu->vf_base_phys + gid * VIOMMU_VF_MMIO_ENTRY_SIZE;
+}
+EXPORT_SYMBOL(amd_viommu_get_vfmmio_addr);
+
 int __init amd_viommu_init(struct amd_iommu *iommu)
 {
 	int ret;
diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h
index 83ed10610957..0b7a3e5b057c 100644
--- a/include/uapi/linux/iommufd.h
+++ b/include/uapi/linux/iommufd.h
@@ -1084,9 +1084,11 @@ struct iommu_viommu_tegra241_cmdqv {
 
 /**
  * struct iommu_viommu_amd - AMD vIOMMU Interface (IOMMU_VIOMMU_TYPE_AMD)
+ * @out_vfmmio_mmap_offset: (out) mmap offset for vIOMMU VF-MMIO
  * @reserved: Must be zero
  */
 struct iommu_viommu_amd {
+	__aligned_u64 out_vfmmio_mmap_offset;
 	__u32 reserved; /* must be last */
 };
 
-- 
2.34.1


  parent reply	other threads:[~2026-05-28  5:18 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-28  5:17 [PATCH v2 00/26] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 01/26] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 02/26] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 03/26] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-06-01 12:43   ` Jason Gunthorpe
2026-06-05  8:45     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 04/26] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-06-01 12:44   ` Jason Gunthorpe
2026-06-05  8:55     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 05/26] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 06/26] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-05-28  5:17 ` Suravee Suthikulpanit [this message]
2026-06-01 12:51   ` [PATCH v2 07/26] iommu/amd: Add support for AMD vIOMMU VF MMIO region Jason Gunthorpe
2026-06-17  6:10     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 08/26] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 09/26] iommu/amd: Introduce domain for IOMMU Private Address (IPA) region Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 10/26] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-06-01 12:59   ` Jason Gunthorpe
2026-06-08  2:45     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 11/26] iommu/amd: Allocate and map vIOMMU private regions Suravee Suthikulpanit
2026-06-01 13:05   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 12/26] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-05-30 20:44   ` Weinan Liu
2026-06-18  3:55     ` Suthikulpanit, Suravee
2026-06-01 13:08   ` Jason Gunthorpe
2026-06-18  3:54     ` Suthikulpanit, Suravee
2026-06-01 13:11   ` Jason Gunthorpe
2026-06-18  4:06     ` Suthikulpanit, Suravee
2026-06-01 18:16   ` Weinan Liu
2026-05-28  5:17 ` [PATCH v2 13/26] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-05-30 21:26   ` Weinan Liu
2026-06-29  3:24     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 14/26] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 15/26] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 16/26] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 17/26] iommu/amd: Pass KVM FD from userspace when initializing vIOMMU Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 18/26] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-06-01 13:31   ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 19/26] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 20/26] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 21/26] iommu/amd: Map kvmfd to shared translate device ID for vIOMMU Suravee Suthikulpanit
2026-06-01 13:35   ` Jason Gunthorpe
2026-06-18  5:50     ` Suthikulpanit, Suravee
2026-06-19 13:40       ` Jason Gunthorpe
2026-05-28  5:17 ` [PATCH v2 22/26] iommufd: Add hw_queue_init and split queue alloc paths Suravee Suthikulpanit
2026-05-29  0:14   ` Nicolin Chen
2026-06-03  0:30     ` Suthikulpanit, Suravee
2026-06-01 13:38   ` Jason Gunthorpe
2026-06-18  5:51     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 23/26] iommu/amd: Add support for vIOMMU HW queues initialization Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 24/26] iommufd: Introduce vIOMMU command via VIOMMU_COMMAND ioctl Suravee Suthikulpanit
2026-05-28  5:17 ` [PATCH v2 25/26] iommu/amd: Handle set/get command for AMD vIOMMU Suravee Suthikulpanit
2026-05-29 23:20   ` Nicolin Chen
2026-06-03  3:53     ` Suthikulpanit, Suravee
2026-05-28  5:17 ` [PATCH v2 26/26] iommu/amd: Introduce logic to check and enable vIOMMU feature Suravee Suthikulpanit
2026-06-01 13:30 ` [PATCH v2 00/26] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Jason Gunthorpe
2026-06-03  4:13   ` Suthikulpanit, Suravee
2026-06-03  6:41   ` Suthikulpanit, Suravee
2026-06-03 12:13     ` Jason Gunthorpe
2026-06-05  8:41     ` Suthikulpanit, Suravee

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260528051738.596013-8-suravee.suthikulpanit@amd.com \
    --to=suravee.suthikulpanit@amd.com \
    --cc=chriscli@google.com \
    --cc=dantuluris@google.com \
    --cc=iommu@lists.linux.dev \
    --cc=jay.chen@amd.com \
    --cc=jgg@nvidia.com \
    --cc=jon.grimm@amd.com \
    --cc=joro@8bytes.org \
    --cc=kevin.tian@intel.com \
    --cc=kpsingh@google.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=nicolinc@nvidia.com \
    --cc=sairaj.arunkodilkar@amd.com \
    --cc=santosh.shukla@amd.com \
    --cc=vasant.hegde@amd.com \
    --cc=wnliu@google.com \
    --cc=wvw@google.com \
    --cc=yi.l.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®