From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f201.google.com (mail-pg1-f201.google.com [209.85.215.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3178257854 for ; Thu, 28 May 2026 20:23:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779999839; cv=none; b=GMYIoRP6wyx0Doxv+LX7DEMtVaAV2jZZQJ4d0mo2YrCVp9KEIfv2dXyHFyf72Ua0BrAAJcK8ZzdrBD8eJzg/3bVNURtwOGLJpqyjt7T+YP7VwV/IYvSGQBNWjGb21gb/ENstv38IzwV5V1DN5SmZ9t31pSMRO292BRK6/GD7c7o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779999839; c=relaxed/simple; bh=hGvy0pHCr8Z9RUIfCnC1sEgi08Pcgdjw5Rm3oBc3hMw=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=gzx2VGBHPdDm8/f8FCMTueS/AI1xH0V8G6t9bJsZ5DRnDKK3ob9skBQqyEMBuYs8lZGa3ywFa60nwCYw2QF3zoscN9PMKGH8aQP1hjnk8UeyLT9ULhOKgxL9sQYsFUCtgUnCF2oHu/1bDgmPGmqQmBDZ3GaAWe6/NXCBdz7SuM0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--praan.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=n9TZUrGc; arc=none smtp.client-ip=209.85.215.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--praan.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="n9TZUrGc" Received: by mail-pg1-f201.google.com with SMTP id 41be03b00d2f7-c850ff84ddfso10341582a12.2 for ; Thu, 28 May 2026 13:23:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779999836; x=1780604636; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=OCRry7rxw58KzBu/2DpFLzdj5hBkFn2md8kzREbSj6E=; b=n9TZUrGcIztBIQcxLEemUdmc98PbHySdZI+UdmOMQle2KHKiI3vQu7Sf48p35MwKJP Ofb+JhUgkcIpvqyJu/ga3ofzM4NR5JEga/LAQhSMq+3pCzKzUGwYrKnM/BAAD5BVMtFY VYmkrc8hqwVrPHe88+343y60xdMP7ELugstktN8U+VDBYvvSFtaTRWdMw9IQ6LeTpkrK XrVcF0RJd/Y5D0Rp11V1GbZDT5YTs22j3sAN73weEFjbuV8pGTLl80z71CnCDcn7aIWH 4mK9tXJMl/QqB50pPLF47Hrx7oSu8bad41+8uW0Gzt8ips/mol9mVFnAImnhsZZkncnK 83kA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779999836; x=1780604636; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=OCRry7rxw58KzBu/2DpFLzdj5hBkFn2md8kzREbSj6E=; b=mOnykQuwbt1VbWqCoPEspLUvRegmCUyR3weaXsNRWu79yXT0MKwR36CsM9sRhSdZVT V5RJ9NxRuvW9lUMylySrgfgmEO2y0eq2JYxBEgx1ymWM4FxEvzKRtb+OYAx6OS8Kq+r5 muR59aABppG0G1Rvt6CMiXE9AIaEKOcjKNlkN60mymX6Tm17TRg9vLITKGaszIXa1B40 bViQUsF06BSBzzv7k5SuUkbchusMZ1xEW9DuoFWc28y4LOyD8gvgit91C3vs49wJk4iq E/j8SyY4jzdO1AiTL+KTq680vY5VPm19Rm2igVGEIOPfsvZSTCKxpfVZonqKwIO6IjpM xvXA== X-Forwarded-Encrypted: i=1; AFNElJ/jenKFepQG6Xu49ZaSnYSZPqDZZi2van7faQ74ApTIECE2Vd3jO5PG5emkeHltDXQBxFKq45CXG8GOCkI=@vger.kernel.org X-Gm-Message-State: AOJu0YwOZaX4QRiZZJHFXsIcVCZka0DS8cMEafSRBrTO5r9aM0Ww8FVA NNL4iL0V+P8Cw4liStST5AIxJngTvl3XCp8m/A3vVRqvcfq8sG1/SNpaMiPUzYi9f0XY7bj1O4c EhA== X-Received: from pgbo29.prod.google.com ([2002:a63:5a1d:0:b0:c82:2e5b:8f33]) (user=praan job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:6a1a:b0:3b2:924f:70af with SMTP id adf61e73a8af0-3b40e648375mr280209637.45.1779999835891; Thu, 28 May 2026 13:23:55 -0700 (PDT) Date: Thu, 28 May 2026 20:23:46 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260528202353.3422206-1-praan@google.com> Subject: [PATCH v5 0/7] iommu: Standardize ATS robustness and state tracking From: Pranjal Shrivastava To: iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Bjorn Helgaas , David Woodhouse , Lu Baolu , Robin Murphy , Suravee Suthikulpanit , Jason Gunthorpe , Nicolin Chen , David Matlack , Samiullah Khawaja , Daniel Mentz , Pasha Tatashin , Mostafa Saleh , Pranjal Shrivastava Content-Type: text/plain; charset="UTF-8" The primary motivation for this series is an ATS state mismatch observed under heavy load (via iova_stress). A failure in pci_enable_ats() leaves IOMMU drivers like arm-smmu-v3 with inconsistent state leading to PCI core warnings during device detach. While David's recent work [1] addressed a discovery race for specific quirked devices by moving them to the HEADER phase, gaps remained regarding how Virtual Functions (VFs) inherit state from their Physical Functions (PFs). Specifically, pci_ats_supported() did not account for PF-level quirked status, and pci_prepare_ats() lacked STU validation for VFs. Based on discussion with Jason in v3 it was decided that IOMMU drivers should explicitly check pci_ats_supported before calling pci_prepare_ats To facilitate this, pci_prepare_ats() has been decoupled from the internal support check. Furthermore, the device probe should fail if pci_prepare_ats() fails. Since these early gates preclude software configuration errors, any remaining failure during pci_enable_ats() is treated as a kernel bug This series standardizes this pattern across ARM SMMUv3, Intel VT-d, & AMD IOMMU drivers, while also hardening the latter two against pre-existing issues found by Sashiko in their probe error paths identified during review. [1] https://lore.kernel.org/linux-pci/20260403222750.1215002-1-dmatlack@google.com/ [v5] - Decoupled pci_ats_supported() from pci_prepare_ats() in the PCI core. - Rebased SMMUv3 support on top of Nicolin's "Always-On ATS" series. - Fixed pre-existing RB-tree corruption in VT-d probe (Baolu/Sashiko). - Addressed the pre-existing UAF in AMD IOMMU probe suggested by Sashiko - Collected R-b tags from Nicolin. [v4] - https://lore.kernel.org/all/20260525184347.4059549-1-praan@google.com/ - Standardized the pattern across Intel VT-d and AMD IOMMU drivers. - Replaced the SMMUv3 ats_prepared gate with a fatal probe-fail logic. - Utilized WARN() macros for runtime enablement failures in all drivers. - Collected R-b tags from Jason and Sami. [v3] https://lore.kernel.org/all/20260519135323.1558777-1-praan@google.com/ [v2] https://lore.kernel.org/all/20260504163842.2692314-1-praan@google.com/ Pranjal Shrivastava (7): PCI/ATS: Ensure pci_ats_supported() is PF-aware for VFs PCI/ATS: Validate STU for VFs in pci_prepare_ats() PCI/ATS: Decouple pci_ats_supported() from pci_prepare_ats() iommu/arm-smmu-v3: Standardize ATS enablement failure reporting iommu/vt-d: Fix RB-tree corruption and Use-After-Free in probe iommu/vt-d: Fail probe on ATS configuration failure iommu/amd: Fail probe on ATS configuration failure drivers/iommu/amd/iommu.c | 30 ++++++++++++++++----- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 +++++-- drivers/iommu/intel/iommu.c | 22 ++++++++++++--- drivers/pci/ats.c | 21 ++++++++++----- 4 files changed, 64 insertions(+), 19 deletions(-) -- 2.54.0.823.g6e5bcc1fc9-goog