From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1673E317B for ; Fri, 29 May 2026 16:30:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; cv=none; b=IYstkYFwdUyLnrEQEbwLiVtQTCA4MT9kz/rn4Rb6HMCg4OvlFpCOyQVs0rD4PNKsUVtp1JVAjSxKpGCEuZd5wgRtgM/eDvLrOqY7AP3Hp44u/IKj5TJFUPEkQYnMKCRC02DdV57B1/4KF2xuoYdLUxSSluLPnsOlAXMKry+0rtE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; c=relaxed/simple; bh=EshJtKvDtKCj+UL3Q6zhjtvpwFNQ8xK5ToenTDu4tpQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=C6aYlnbTnAsDeLwghY+4PcgCeF1NMgxZGs+3rvKXsVdOfTW3QSGkVQ/JkVu+Gjpl7tAGt3PXLGUlJQYvqPOMP2eJrHPbpN/eWRRGeBV/WcwqWVGGyj8AZIzlGfsc6Hp6r3Xl5Qf9Fj6r86tBTOgkaOU2cszNQF8rHCLrq7iZKns= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=hcAxgKPn; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="hcAxgKPn" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id F16204E42D93; Fri, 29 May 2026 16:30:17 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C74EE601FA; Fri, 29 May 2026 16:30:17 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 55ABA10888CC6; Fri, 29 May 2026 18:30:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1780072217; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=lgdiO3aZNk41NZamSPA1ZPEFzEUzPqxYcHHOBzZNsnY=; b=hcAxgKPnksVp9dFX/J7K+ldpVTY1UJQTBnTzLv/NtLO4SyLDuvP6j1qhc1LaB2xnX6ebfm pTtY4e7u9UETUoXIublwFGCpg81ask40py6Az7iGfU+DSpLAIpYp0XdlEg4h3pLjR8gOFX i+x3Hupoic8EDgVwHZtwFDd7v3yuOTbeI2Tc3qmyGlvRUH6hzKPkOgYC3ZsZpbBsiDRa11 Twby6swkuBahACrq7S36ywpJmG3Y4rvbcT/UgLLbsECPFESCpJPqdhkqlnBgvF3QyD8Yzf XuHmy4dYjwkXkZXuAlCoEZ9LPmnTN8KifXCzEnP86gX/g3zrcMwV+o4JPh20Sg== From: "Miquel Raynal (DAVE)" Date: Fri, 29 May 2026 18:29:57 +0200 Subject: [PATCH 2/3] mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260529-dave-upstream-nand-fixes-v1-2-8c72aa23aee2@bootlin.com> References: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> In-Reply-To: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> To: Michal Simek , Richard Weinberger , Vignesh Raghavendra , Andrea Scian Cc: Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal , stable@vger.kernel.org X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Any access not using the hardware ECC engine should be monolithic because the controller has its very own way of handling the end of a transaction during operation configuration, so we cannot easily make repeated reads. This has the side effect of fixing support for software ECC engines. Suggested-by: Andrea Scian Cc: stable@vger.kernel.org Fixes: 08d8c62164a3 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller") Signed-off-by: Miquel Raynal (DAVE) --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c index 986019b42153..a941b5c836a3 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -917,7 +917,6 @@ static int pl35x_nand_init_hw_ecc_controller(struct pl35x_nandc *nfc, chip->ecc.steps = mtd->writesize / chip->ecc.size; chip->ecc.read_page = pl35x_nand_read_page_hwecc; chip->ecc.write_page = pl35x_nand_write_page_hwecc; - chip->ecc.write_page_raw = nand_monolithic_write_page_raw; pl35x_smc_set_ecc_pg_size(nfc, chip, mtd->writesize); nfc->ecc_buf = devm_kmalloc(nfc->dev, chip->ecc.bytes * chip->ecc.steps, @@ -984,7 +983,6 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip) case NAND_ECC_ENGINE_TYPE_NONE: case NAND_ECC_ENGINE_TYPE_SOFT: dev_dbg(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n"); - chip->ecc.write_page_raw = nand_monolithic_write_page_raw; break; case NAND_ECC_ENGINE_TYPE_ON_HOST: dev_dbg(nfc->dev, "Using hardware ECC\n"); @@ -998,6 +996,9 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip) return -EINVAL; } + chip->ecc.read_page_raw = nand_monolithic_read_page_raw; + chip->ecc.write_page_raw = nand_monolithic_write_page_raw; + return 0; } -- 2.53.0