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Bit 2 belongs to FUNC_SEL. MSM_PULL_MASK is used to isolate the GPIO_PULL bits before writing the pull configuration (PULL_DOWN: 0x1, PULL_UP: 0x3) to the GPIO_CFG register. Narrow it to bits [1:0] to prevent unintended modification of the FUNC_SEL field. This causes no functional change since the driver currently does not modify the FUNC_SEL bit, but align the mask with hardware configuration nonetheless. Signed-off-by: Sneh Mankad --- drivers/pinctrl/qcom/tlmm-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/tlmm-test.c b/drivers/pinctrl/qcom/tlmm-test.c index 7d7fff538755a2bcebf94dfb1ca00d4e9948c748..b655de5b4c5f08e7b138f0da24546274bc5fa93b 100644 --- a/drivers/pinctrl/qcom/tlmm-test.c +++ b/drivers/pinctrl/qcom/tlmm-test.c @@ -33,7 +33,7 @@ * dynamically, rather then relying on e.g. Devicetree and phandles. */ -#define MSM_PULL_MASK GENMASK(2, 0) +#define MSM_PULL_MASK GENMASK(1, 0) #define MSM_PULL_DOWN 1 #define MSM_PULL_UP 3 #define TLMM_REG_SIZE 0x1000 -- 2.34.1