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Fri, 29 May 2026 07:06:13 -0700 (PDT) Received: from arch.localdomain ([2409:8a28:a5f:4fa1:cc65:18c0:209b:38a4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2bf23c51f80sm22926645ad.80.2026.05.29.07.06.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 07:06:13 -0700 (PDT) From: Jun Yan To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Arseniy Krasnov Cc: Jun Yan , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/3] arm64: dts: amlogic: meson-axg: NAND fix and PCIe PHY adjustment Date: Fri, 29 May 2026 22:05:56 +0800 Message-ID: <20260529140605.1070764-1-jerrysteve1101@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit - Fix NAND pinctrl by adding missing nand_rb0 pin. - Disable unused pcie_phy to suppress probe warning. - Re-enable pcie_phy on S400 board to keep PCIe working. All changes have been tested on real hardware. Jun Yan (3): arm64: dts: amlogic: meson-axg: Add missing nand_rb0 pin to nand_all_pins arm64: dts: amlogic: meson-axg: Disable pcie_phy node by default arm64: dts: amlogic: meson-axg-s400: Enable pcie_phy arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) -- 2.54.0