From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D7B643E48A for ; Fri, 29 May 2026 14:47:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780066063; cv=none; b=s+n20XLvhPBXJPlCgYfuWkNm8GzUTf/J/tGuWxnOuFqpAi8cMiHNDlNPWbgfc62BBnUL1ps6QJ2P4uZU1YG6q3M4Mm+zDvyLoUBOhikyo+NGagoFR0EwOWAbWujQLurcQP/WSuW+1MV35esb52FlseKTXSVLxEtKcopPFPQFFsU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780066063; c=relaxed/simple; bh=h/rZujb5vQ/7BLVxTXXB95gj7Z4ou4+X2pZ4A1QepVE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gOkjb6B33SGWJOoR4uj/vjFnzoPJJtYXyASUJlB1nLTJ49Cu8iJLeiWWEBeOCJ/lQ28ca90t/r/bHDYEGWYC9jW9arOVhknfKUU9T5nthKXN5a/9DDBYI589K3JVLcBQvv/lN6mYdjX0O6KbVeaEkJqfuNfcrx99FI5COweSLME= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=MP9l76LH; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="MP9l76LH" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-49050ff7cbdso66074755e9.2 for ; Fri, 29 May 2026 07:47:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1780066059; x=1780670859; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E2+5EHsPFnutewiVxQ2U2ZYN7ZmcP1XidbGdGtxQQJk=; b=MP9l76LHKt7w7iII/OkSdcswGsG0815LK7h3EwOi1uWkuyC1B0sSJikPfxZwsP5zam ie7r/9/4Gg7bWMPQDf0kCy7RNeLtEnrC11f2INIROL9gDjNw2KS/d3Ukj/7JQPwqAIK2 FsMGJQFk6LrySlZgH4NlWc4cIOpqLSmOok4KI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780066059; x=1780670859; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=E2+5EHsPFnutewiVxQ2U2ZYN7ZmcP1XidbGdGtxQQJk=; b=i55QO/TkwsgonfkjSyo0DfBDjf2l2o6DZf4uhaxX4USRoMzB+5u7SpYyWgNNOTyaSD UivxNqrBkRKk3SuRE6b2QWDFKca1+avUkJzJmLI+XHK3Bt0dXiO1O53fjunhFJ9XFbm4 XyXQAOEktzyvjyT3QJcAiE/BzL/8EeR3SfC2qsLalyV3CqWhrNx1IIv7y464Zbw9OVeK +9qVE8XkbBY46w/B3+xATkGEamnVi93WdgEiW6yQxKWnCPeJk1w/dwuD+qXLbhP4zqQo jR5OcivQNwQRcAOQ6PfHeEksdX47PHHRDqS9HsQ53Mdl5SUJ0SKW0TnvQIeuCkk018Ke Artg== X-Gm-Message-State: AOJu0YzM+6cCLeI2HfAoKIhzH97lq1VvjXGk6Wm9AvSmUZbPHSxUq3sC AxnTeYttMkIyX6RL/+1H/L/0NHTet0u7WuwqiImmB8TqNJaHojS/BuCUQiBUPgIqjE5xCZphBr+ mFix6 X-Gm-Gg: Acq92OHty8gFdPRrgJQ8g36/uyFgSu6iN/T6J6KakMOxn5scXdXVQUWRDGEMP9w7srJ eqbE6eV3TZwOBJ0LQ+pmsvkQJx6nrqzHkhNtgqcSpN9zaDtJcdj+N7CM9y/ARii5IMXnE5+Izny hPqdp69ZV0XMcDj9sOMGq+OYqrub8gox7SVRb0GA5HzrIpuC2SW6QT3490z6/WGFrF8ZWtGn6df oVsBi7HR3hIS3eJ3ygQnY/KyWXnDoAEAOTpcCc7ioq/hSBTIR2S9wMULKVKcUeUwFX+h5EtyVV/ qS3YnecwmLLKupaIDoBiYTuOwXwnag+5Ldwd6PFn0mZlNin3glGCFmvRR/05H5L8sPoj9h1rwIi L626ZA5xzzF0UfKz3CMS9mHi15Phqz7nr58TI1umujCKEVTsMq+E0X/RddB/ck3FVwLIjE6P9Cw VQEszJzjQ3zJtz6q8N0Tzn0pNgNG1ZzY7ld+dO5M63UeYSvxHsn5t9GbjHrZENbuw774ncgXmC6 Mni9uRAib/NWYjlH52cKOri5ECPRaQsew0/0/g7bEftWM97erl3w5H+K4w= X-Received: by 2002:a05:600c:1453:b0:490:9536:c513 with SMTP id 5b1f17b1804b1-4909c0b0012mr41515945e9.19.1780066059157; Fri, 29 May 2026 07:47:39 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909d6eb470sm38694785e9.10.2026.05.29.07.47.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 07:47:38 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: domenico.acri@engicam.com, francesco.utel@engicam.com, michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 13/15] arm64: dts: st: support Engicam MicroGEA-STM32MP257-RMM board Date: Fri, 29 May 2026 16:46:27 +0200 Message-ID: <20260529144707.3931919-14-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260529144707.3931919-1-dario.binacchi@amarulasolutions.com> References: <20260529144707.3931919-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Support for Engicam MicroGEA-STM32MP257-RMM board with: - 8 GB eMMC Flash - 2 GB LPDDR4 DRAM - CAN - LEDs - LCD panel with touchscreen - Micro SD card connector - Audio codec - Buzzer Signed-off-by: Dario Binacchi --- Changes in v2: - Drop the clocks property from the sai1 node in stm32mp257-engicam-microgea-rmm.dts to avoid overriding the peripheral bus clock reference defined in the base SoC device tree. Suggested by Sashiko. - Reference the existing labeled nodes directly at the root level using &sai1a and &sai1b in stm32mp257-engicam-microgea-rmm.dts instead of redefining the entire node structure and redeclaring the labels. Suggested by Sashiko. - Drop the #clock-cells property from sai1a and remove the reference to sai1a from the clocks array in sai1b, relying strictly on the st,sync property to handle internal synchronization. arch/arm64/boot/dts/st/Makefile | 1 + .../st/stm32mp257-engicam-microgea-rmm.dts | 319 ++++++++++++++++++ 2 files changed, 320 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makefile index 63908113ae36..386eca593c54 100644 --- a/arch/arm64/boot/dts/st/Makefile +++ b/arch/arm64/boot/dts/st/Makefile @@ -2,5 +2,6 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32mp215f-dk.dtb \ stm32mp235f-dk.dtb \ + stm32mp257-engicam-microgea-rmm.dtb \ stm32mp257f-dk.dtb \ stm32mp257f-ev1.dtb diff --git a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts new file mode 100644 index 000000000000..0212c03aae1a --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts @@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2026 Amarula Solutions, Dario Binacchi + * Copyright (C) 2026 Engicam srl + */ + +/dts-v1/; + +#include +#include +#include + +#include "stm32mp257-engicam-microgea.dtsi" + +/ { + model = "Engicam MicroGEA STM32MP257D RMM Board"; + compatible = "engicam,microgea-stm32mp257-rmm", + "engicam,microgea-stm32mp257", "st,stm32mp257"; + + aliases { + mmc0 = &sdmmc1; + mmc1 = &sdmmc2; + serial0 = &usart2; + serial1 = &usart1; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = <0 100>; + num-interpolated-steps = <100>; + default-brightness-level = <85>; + pwms = <&pwm2 0 100000 0>; + }; + + buzzer { + compatible = "pwm-beeper"; + pwms = <&pwm4 0 1000000 0>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer { + compatible = "simple-framebuffer"; + clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>; + lcd-supply = <®_3v3>; + status = "disabled"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&gpioh 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + status = "okay"; + }; + + led-1 { + gpios = <&gpioh 6 GPIO_ACTIVE_HIGH>; + default-state = "off"; + status = "okay"; + }; + }; + + mclk: clock-mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + reg_1v8: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_ext_pwr: regulator-ext-pwr { + compatible = "regulator-fixed"; + regulator-name = "ext-pwr"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpiog 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + sound { + compatible = "audio-graph-card"; + label = "STM32MP25-RMM"; + widgets = "Headphone", "Headphone Jack", + "Microphone", "Microphone Jack"; + routing = "Headphone Jack", "HP_OUT", + "MIC_IN", "Microphone Jack", + "Microphone Jack", "Mic Bias"; + dais = <&sai1a_port &sai1b_port>; + status = "okay"; + }; +}; + +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_sleep_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + touchscreen@38 { + compatible = "edt,edt-ft5306"; + reg = <0x38>; + interrupt-parent = <&gpiob>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpiod 1 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1280>; + touchscreen-size-y = <800>; + }; +}; + +&i2c2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c2_pins_a>; + pinctrl-1 = <&i2c2_sleep_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + #sound-dai-cells = <0>; + clocks = <&mclk>; + + VDDA-supply = <®_3v3>; + VDDIO-supply = <®_3v3>; + VDDD-supply = <®_1v8>; + + sgtl5000_port: port { + #address-cells = <1>; + #size-cells = <0>; + + sgtl5000_tx_endpoint: endpoint@0 { + reg = <0>; + remote-endpoint = <&sai1a_endpoint>; + frame-master = <&sgtl5000_tx_endpoint>; + bitclock-master = <&sgtl5000_tx_endpoint>; + }; + + sgtl5000_rx_endpoint: endpoint@1 { + reg = <1>; + remote-endpoint = <&sai1b_endpoint>; + frame-master = <&sgtl5000_rx_endpoint>; + bitclock-master = <&sgtl5000_rx_endpoint>; + }; + }; + }; +}; + +<dc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <<dc_pins_a>; + pinctrl-1 = <<dc_sleep_pins_a>; + status = "okay"; + + port { + ltdc_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_a>; + pinctrl-1 = <&m_can1_sleep_pins_a>; + status = "okay"; +}; + +&sai1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sai1a_pins_a>, <&sai1b_pins_a>; + pinctrl-1 = <&sai1a_sleep_pins_a>, <&sai1b_sleep_pins_a>; + status = "okay"; +}; + +&sai1a { + dma-names = "tx"; + status = "okay"; + + sai1a_port: port { + sai1a_endpoint: endpoint { + remote-endpoint = <&sgtl5000_tx_endpoint>; + dai-format = "i2s"; + mclk-fs = <512>; + }; + }; +}; + +&sai1b { + dma-names = "rx"; + st,sync = <&sai1a 2>; + clocks = <&rcc CK_KER_SAI1>; + clock-names = "sai_ck"; + status = "okay"; + + sai1b_port: port { + sai1b_endpoint: endpoint { + remote-endpoint = <&sgtl5000_rx_endpoint>; + dai-format = "i2s"; + mclk-fs = <512>; + }; + }; +}; + +/* MicroSD */ +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&scmi_v3v3>; + vqmmc-supply = <&scmi_vddio1>; + no-1-8-v; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&spi1_pins_a>; + pinctrl-1 = <&spi1_sleep_pins_a>; + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&gpioh 8 GPIO_ACTIVE_HIGH>, <&gpioh 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + + display: display@0 { + compatible = "rocktech,rk050hr345-ct106a", "ilitek,ili9806e"; + reg = <0>; + vdd-supply = <®_3v3>; + spi-max-frequency = <10000000>; + reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; + backlight = <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint = <<dc_out>; + }; + }; + }; +}; + +&timers2 { + status = "okay"; + + pwm2: pwm { + pinctrl-0 = <&pwm2_pins_a>; + pinctrl-1 = <&pwm2_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; +}; + +&timers4 { + status = "okay"; + + pwm4: pwm { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pwm4_pins_a>; + pinctrl-1 = <&pwm4_sleep_pins_a>; + status = "okay"; + }; +}; + +&usart1 { + pinctrl-names = "default", "idle", "sleep"; + pinctrl-0 = <&usart1_pins_b>; + pinctrl-1 = <&usart1_idle_pins_b>; + pinctrl-2 = <&usart1_sleep_pins_b>; + /delete-property/ dmas; + /delete-property/ dma-names; + status = "okay"; +}; + +&usart2 { + pinctrl-names = "default", "idle", "sleep"; + pinctrl-0 = <&usart2_pins_a>; + pinctrl-1 = <&usart2_idle_pins_a>; + pinctrl-2 = <&usart2_sleep_pins_a>; + /delete-property/ dmas; + /delete-property/ dma-names; + status = "okay"; +}; -- 2.43.0