From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71CC9421EFB for ; Fri, 29 May 2026 19:04:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081449; cv=none; b=GG+Oa5WkGQd74JU2NMF/xc3TKLO/Jjpl5KNokmKDaI8A4UjiWWXMmx/cAJm+jopjrqT/j4/4E7479Jwx0dxPUMc00tn54P4eUzSQ9ceukQAyENQHbZmBX9/U3txnobQiTryyvmKCuZElpQnz9Oyp9UJvsgJuWtJv3jh8PvoV1ow= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081449; c=relaxed/simple; bh=zSdkao+E+mbJKqVm1QfkfZoavLXz9QKvvoTnB02qL0o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JfCVBhw+/BtBtaO8H71yBOasdLLf1JNbThimbNyqQRLdtJLileHFAZ06+0i+yXwmRWWIXpbUbwXnC+qs64dGVQpQwL8R2RUuhJeF/j5NKqToTtZaHkfanuwLuFuDkQfTcPXbLJfSsBtM8f6ssRMb0i+raVDrQZvhUrmpxVE0cdo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=u1Yd0D/u; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="u1Yd0D/u" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=iVdbJHhjSmD5Wk53U97PpC2LZja+TnFLISVdSMujlOg=; b=u1Yd0D/uA4P6C4V+/NYXNIkp2C 5KmcSai1P98PRmy42DVQ/KSjVdpbwLoR9IjnH0KvDl6+MevRdhERRA/9/EJ9QrRDmaFtQf3m3ajJj j/RZWOzjncZB21m4nNz0x11LBSx1g1cpEGbu0dpDSClX58/ceisS+xnmZdk12pPd9Ej1CERmhmIbZ 6W5DSjHXGucEjLWf3NzThJ5uKu0JGNhOEJxM1NWWzwtm9pUvgWkgS3WP29jxqJrxU5EhDy36WaYkx TRDiXIXp/L1wWGdtY0VDLOkx0s/WCqRffmabul3p0T5nI+t3/SJ8hcAdRZOOZvfmsyfnZ0jKF1M0c /gAmS02w==; From: Heiko Stuebner To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, amadeus@jmu.edu.cn, jonas@kwiboo.se Subject: [PATCH v4 1/5] arm64: dts: rockchip: Add USB nodes for RK3528 Date: Fri, 29 May 2026 21:03:51 +0200 Message-ID: <20260529190355.4148175-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260529190355.4148175-1-heiko@sntech.de> References: <20260529190355.4148175-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Jonas Karlman Rockchip RK3528 has one USB 3.0 DWC3 controller and oneUSB 2.0 EHCI/OHCI controller and uses an Innosilicon-USB2PHY for USB 2.0. The DWC3 controller additionally uses the Naneng Combo PHY for USB3. Add device tree nodes to describe these USB controllers along with the USB 2.0 PHYs. Signed-off-by: Jonas Karlman [moved snps,dis_u2_susphy_quirk here from individual boards, describe both usb2+3 default phy connections, usb2 boards can override] Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 77d314716b43..03cd00f88dbb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -336,6 +336,33 @@ pcie_intc: legacy-interrupt-controller { }; }; + usb_host0_xhci: usb@fe500000 { + compatible = "rockchip,rk3528-dwc3", "snps,dwc3"; + reg = <0x0 0xfe500000 0x0 0x400000>; + clocks = <&cru CLK_REF_USB3OTG>, + <&cru CLK_SUSPEND_USB3OTG>, + <&cru ACLK_USB3OTG>; + clock-names = "ref_clk", "suspend_clk", "bus_clk"; + interrupts = ; + power-domains = <&power RK3528_PD_VPU>; + resets = <&cru SRST_A_USB3OTG>; + dr_mode = "otg"; + phys = <&usb2phy_otg>, <&combphy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis_rxdet_inp3_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis_u2_susphy_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status = "disabled"; + }; + gic: interrupt-controller@fed01000 { compatible = "arm,gic-400"; reg = <0x0 0xfed01000 0 0x1000>, @@ -349,6 +376,30 @@ gic: interrupt-controller@fed01000 { #interrupt-cells = <3>; }; + usb_host0_ehci: usb@ff100000 { + compatible = "generic-ehci"; + reg = <0x0 0xff100000 0x0 0x40000>; + clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts = ; + phys = <&usb2phy_host>; + phy-names = "usb"; + power-domains = <&power RK3528_PD_VO>; + status = "disabled"; + }; + + usb_host0_ohci: usb@ff140000 { + compatible = "generic-ohci"; + reg = <0x0 0xff140000 0x0 0x40000>; + clocks = <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts = ; + phys = <&usb2phy_host>; + phy-names = "usb"; + power-domains = <&power RK3528_PD_VO>; + status = "disabled"; + }; + qos_crypto_a: qos@ff200000 { compatible = "rockchip,rk3528-qos", "syscon"; reg = <0x0 0xff200000 0x0 0x20>; @@ -1281,6 +1332,35 @@ combphy: phy@ffdc0000 { rockchip,pipe-phy-grf = <&pipe_phy_grf>; status = "disabled"; }; + + usb2phy: usb2phy@ffdf0000 { + compatible = "rockchip,rk3528-usb2phy"; + reg = <0x0 0xffdf0000 0x0 0x10000>; + clocks = <&cru CLK_REF_USBPHY>, <&cru PCLK_USBPHY>; + clock-names = "phyclk", "pclk"; + #clock-cells = <0>; + clock-output-names = "clk_usbphy_480m"; + power-domains = <&power RK3528_PD_VO>; + rockchip,usbgrf = <&vo_grf>; + status = "disabled"; + + usb2phy_otg: otg-port { + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb2phy_host: host-port { + interrupts = ; + interrupt-names = "linestate"; + #phy-cells = <0>; + status = "disabled"; + }; + }; }; }; -- 2.47.3