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The FSP falcon replaces SEC2's role in the boot sequence for these newer architectures. This initial stub just defines the falcon type and its base address. Signed-off-by: John Hubbard --- drivers/gpu/nova-core/falcon.rs | 1 + drivers/gpu/nova-core/falcon/fsp.rs | 28 ++++++++++++++++++++++++++ drivers/gpu/nova-core/gsp/hal/gh100.rs | 7 +++++-- 3 files changed, 34 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/nova-core/falcon/fsp.rs diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index 24cc2c26e28d..053ce5bea6cd 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -40,6 +40,7 @@ regs, }; +pub(crate) mod fsp; pub(crate) mod gsp; mod hal; pub(crate) mod sec2; diff --git a/drivers/gpu/nova-core/falcon/fsp.rs b/drivers/gpu/nova-core/falcon/fsp.rs new file mode 100644 index 000000000000..73fb73cb73a5 --- /dev/null +++ b/drivers/gpu/nova-core/falcon/fsp.rs @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + +//! FSP (Firmware System Processor) falcon engine for Hopper/Blackwell GPUs. +//! +//! The FSP falcon handles secure boot and Chain of Trust operations +//! on Hopper and Blackwell architectures, replacing SEC2's role. + +use kernel::io::register::RegisterBase; + +use crate::falcon::{ + FalconEngine, + PFalcon2Base, + PFalconBase, // +}; + +/// Type specifying the `Fsp` falcon engine. Cannot be instantiated. +pub(crate) struct Fsp(()); + +impl RegisterBase for Fsp { + const BASE: usize = 0x8f2000; +} + +impl RegisterBase for Fsp { + const BASE: usize = 0x8f3000; +} + +impl FalconEngine for Fsp {} diff --git a/drivers/gpu/nova-core/gsp/hal/gh100.rs b/drivers/gpu/nova-core/gsp/hal/gh100.rs index 9a4bb22578b3..fe2689764c8d 100644 --- a/drivers/gpu/nova-core/gsp/hal/gh100.rs +++ b/drivers/gpu/nova-core/gsp/hal/gh100.rs @@ -11,6 +11,7 @@ use crate::{ driver::Bar0, falcon::{ + fsp::Fsp as FspEngine, gsp::Gsp as GspEngine, sec2::Sec2, Falcon, // @@ -35,14 +36,16 @@ impl GspHal for Gh100 { fn boot<'a>( &self, _gsp: &'a Gsp, - _dev: &'a device::Device, + dev: &'a device::Device, _bar: &'a Bar0, - _chipset: Chipset, + chipset: Chipset, _fb_layout: &FbLayout, _wpr_meta: &Coherent, _gsp_falcon: &'a Falcon, _sec2_falcon: &'a Falcon, ) -> Result> { + let _fsp_falcon = Falcon::::new(dev, chipset)?; + Err(ENOTSUPP) } } -- 2.54.0