From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 844483264D5 for ; Sat, 30 May 2026 16:07:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780157242; cv=none; b=ncupx7fT/YBta+72QRkFWm3AjU+zXF7hIN6PufpiTNxQC7/rEuiggOrMrr8ocxtH6kSgGcsrQmolRV3lUwQLYfEHm2iSRN0VXqu9NQf1+7Aj2Gqqu8QO2clCY2e4n5Z8MrSnoyWwZ3QHJtnrH00YhuDBrPCbjf0H2vmfiUOjl8E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780157242; c=relaxed/simple; bh=tZfd/ISESKohi7rVf3H86fUzZEpjAxBv1DvbXjeNK2g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XUzC/t6JB0gH8XjRxnl5x+iR5yJ6uQ3DXskyBztvBZq9FKGLo48MqTAzbyyGYOi9YEcoD9g50CpBBdiYRWfIjJKLLseT+TZHZEUy+L/gEZcaBBIf91BHePS0aTx0gGTtSHBjEQBDQJdfDlcsJeb90dpLriGzWotAmt4uGZ7OoHg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EqF2hDXX; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EqF2hDXX" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-45ef1629ff4so1297542f8f.0 for ; Sat, 30 May 2026 09:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1780157240; x=1780762040; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+SJMrJ4Tyw4rnth10NKoarZEEEB3Q5hOPvF+j2hwsdo=; b=EqF2hDXXWHydBl2C49IydzSYwvEtoKSkO0FF+LuzVOnE1kWfh4XWvFEu1G+AyHSV06 xxB+sA/ULyQhFwTiYcjSH8aBnBN+3OwksCDlKkMU3nS99falyqYcmw3yX0gMMKhokapa UvXPlQ1mC6cVp6oOf+6KBUwM8LYDBY9obHCa70a0hAIouU3RwLrppT/z9S17YRMjYGlZ KK1sWWqjcJTFbUg8FtwDrWOFSemRMC+C0E2WQ5NZnMwcC3use+JS+hCfTWmM2EITsSkm jo79R5GIClBEIum5rDYmckirLtxEVkjVGtdZH5GEIxvTu/kx/SQwyH9VweLqjNm2TFq4 kLZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780157240; x=1780762040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=+SJMrJ4Tyw4rnth10NKoarZEEEB3Q5hOPvF+j2hwsdo=; b=E/I1T4O0yL3kLQDXKW86vUfPY/Y5dMbuutD4GZSehgrW8jYoZqMjsP3XSG7BsyaP4G JQJB2fLZCslgyiiVT9BT+R1ewWzFmTF5GYUTrJBufFOT+rU+Lz8V6ieyTShpvMsoOO3q TNcn9OvFhLsQhiydE3NgcLkSuHqlxUuKeo22uOPn1Wg2XmUOKugHz16AzbUBhEZOhRoF NtNu2WF8c/461P7os3LgDE7TXbW5QsyWzD1E8hr2fzfz1xZbGSMExBosG35tEi/UffaQ mzZwzmN3VJo1gYomIdTXRJyFGqoOVwCRenL3omgRloePJLbx+TLN2FSMm2aEREiCnO0r sL7Q== X-Forwarded-Encrypted: i=1; AFNElJ+scP5UiLAEfO1+23X3XKwLwmNzU1AwBrVaUz3YwGF3xzgasgjO1CxZygOu4JL7hRh2pX0AQ2G/kdhXJTA=@vger.kernel.org X-Gm-Message-State: AOJu0Yz77/C7i1OYw6m7sSo5HrG1syxow3YnHjCAtSaY0p+asQUoNDEA bCpUTjgJ4jk2lpNxcydiw7aihZOBg1LM9M+afJGMm3EiduY2MhnGGIpr X-Gm-Gg: Acq92OH0bwUjqWOIwFHIq8zLgqnqyv0qhnwjAOE6xnRPU06Rh3yTnMTCx4/Exaf3Qjp 6AbrLiRbw8skmz0KU8MtRqDDvXwVn6NFomWsK9TMzXAELaVaKIfrF6Vo7WNk0K62l1G5s9PDg2u 2NHrnSWz6/zzVzKUi24pCl/mspgkYv5lkkO6g/2vjn+/al1Q4nHh/TplL4bLeFe20Z1TGVsG2wP ynIEAs7OW7nsKhts6kCRgui4OFdzIzMo+G5iZZWFDbJuV1rdzIjwwEityaHHc6l/snjUyaBXI6r cMiDR17f180/pmRrn2LOQtqZ0g37cyJztvJrHB8PBuQDDyl+c9ws/EGMHq0RPlFBg+rkNRgYm1c ulWvZD2wYLBCim+RT62flM5fG4d/k+/GFyI+gak4sD2bn6Z84ECvlaGfOzKSD9qOYgqw2Hgj31j GKACRnHH+WtbhdrzUmj6OheLB7eu8= X-Received: by 2002:a5d:5989:0:b0:45f:68a7:38d0 with SMTP id ffacd0b85a97d-45f68a73a2amr1942009f8f.0.1780157239975; Sat, 30 May 2026 09:07:19 -0700 (PDT) Received: from olympus.. ([2a0a:ef40:ea3:3f01:2e0:4cff:fe68:285]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45ef32fabcasm11667339f8f.0.2026.05.30.09.07.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 May 2026 09:07:19 -0700 (PDT) From: Dawid Olesinski To: herbert@gondor.apana.org.au, davem@davemloft.net, heiko@sntech.de Cc: linux-crypto@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, clabbe@baylibre.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, Dawid Olesinski Subject: [PATCH 3/4] arm64: dts: rockchip: Add crypto node to rk356x-base Date: Sat, 30 May 2026 17:06:44 +0100 Message-ID: <20260530160704.3453555-4-dawidro@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260530160704.3453555-1-dawidro@gmail.com> References: <20260530160704.3453555-1-dawidro@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the device tree node for the V2 cryptographic hardware accelerator on RK356x SoCs (RK3566, RK3568). The IP block sits in the non-secure peripheral domain. Its three clocks (core, aclk, hclk) and reset line are accessible directly through the main non-secure CRU, so no firmware intermediary is required. The node is disabled by default; board files that wish to use hardware crypto offload must enable it. Signed-off-by: Dawid Olesinski --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index 64bdd8b7754b..3b73a56046e7 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -1171,6 +1171,18 @@ gpu_leakage: gpu-leakage@1d { }; }; + crypto: crypto@fe380000 { + compatible = "rockchip,rk3568-crypto"; + reg = <0x0 0xfe380000 0x0 0x2000>; + interrupts = ; + clocks = <&cru CLK_CRYPTO_NS_CORE>, <&cru ACLK_CRYPTO_NS>, + <&cru HCLK_CRYPTO_NS>; + clock-names = "core", "aclk", "hclk"; + resets = <&cru SRST_CRYPTO_NS_CORE>; + reset-names = "core"; + status = "disabled"; + }; + i2s0_8ch: i2s@fe400000 { compatible = "rockchip,rk3568-i2s-tdm"; reg = <0x0 0xfe400000 0x0 0x1000>; -- 2.47.3