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Wysocki" , Len Brown , Borislav Petkov , Mario Limonciello , Yazen Ghannam , , , , Thomas Gleixner , "Ingo Molnar" , Dave Hansen , CC: Vilas Sridharan , K Prateek Nayak , "H. Peter Anvin" , Andrew Cooper , Mikhail Paulyshka , Kai Huang , Rong Zhang Subject: [RFC PATCH 3/3] x86/cpu/amd: Fetch S5_RESET_STATUS from PHAT when supported Date: Wed, 3 Jun 2026 06:33:16 +0000 Message-ID: <20260603063317.13665-4-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260603063317.13665-1-kprateek.nayak@amd.com> References: <20260603063317.13665-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|DS7PR12MB6005:EE_ X-MS-Office365-Filtering-Correlation-Id: 0762d25c-5396-498c-1b85-08dec13a29cf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|7416014|376014|921020|18002099003|22082099003|56012099006|11063799006; X-Microsoft-Antispam-Message-Info: EYxKBC2wjfGd+xGvAdVj7B7aakWAXHLakQBS8U2i/AXmUN4MV2JXxlPJjaLiNuPcL7wbg00r2dXzW8eHdObTqXh+Vji4jezYY+Pq1ktLxdzx5ai8hxvbbkOTdvwK908SLOBJbgofOsulJGmbHGjex92JL3K6IIqqHNwyJ7xowmZTt2E65SEdOrYxRUWHb4Rp/G3+gcsNKQwKywGLY4QOY6U5IoLm4pjpvypfNnIis1m31ZdtjiA0lnc+wRrss82gZ6rozz6I/ThCE8bDjr1+NMYyGIfO8eM6DkcjpuMUWqXkP8pFW02Ff22sZ9xHet5+1bg1lgCirY1rzYi6gDmlXsN4HsCt5S1VZiSQX7d+jvrCWwBiI1KwhsEwjVADJeJ09CMsZ6hnOlezSjQTR5Onq34oe1W2uumm74XyZQtWn7XlUZpMYCVYM7OxT8B9RXL82DIK1wTzUqMh+VsM3LCBlkfb+4EgGjhzJ+astj/KNsS19ausjMzJRc5vrz/9QMIbZ/lfTdIHhHa5an4eje8GLcNVVWwQAzn0LGuADpI+zhy7ITicDhHyhf1WZ1p6K3jO5z7PeiYWAialpGwALlVl/0TMEBpE0kvNl0emDCHDT+riz427JcLw/U0/5d/jdkc3M6Qpts9xfpR/6IuMbf6t1mLGjqdzXeXDu3e0F9yn5THf3A36IOdT0O7Q0vGftt8mg1AMPrKUpknxsqERjs3g59YGvC6Zq1iT3totSEwzBFxMFmchDnA1buuflvrFKVtBcV0uOaTl+dVCk7ni/perXg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700016)(7416014)(376014)(921020)(18002099003)(22082099003)(56012099006)(11063799006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 1s7RJjGFNa9ecz6bYJo5TGKqlwVsc6Jn/UDJJuZpMtWeecJAWh7P2T3pt+AFDIdsbDhDdwOrT4xq4qj5miYq3r7e4xvONiGyG7o5nKbeaf78T7ttRcQKyiY0iECnis5+f2r91o/1myIAAWLcLVQHp4I3ivRxPzTfrrZ9CbKLtxodCDb/fUm/yTqLS3Hc5fhYWBIHmdGBNjFBr8vFHprZSwMSit1bkqdfslZi2/8ozhRC/VTEZUz5jwYVqFYmNdlpNggcz9b+/gvtUZjm9bPMHSqwHisiSpvMBWrbCERNNPuq/4bMe+isitykwWGM4rskDgFAUWXvExmj4WhoHqF7l5JfrLeWvnLFTzmxf3exUjTyTRLNOB9I004ML5A2YNw3s/xPpugkiK3vCQwnD2D+jheKerAWN7ThIjALYGUeXjHC5FNLYcqbdSDocUF8NoDl X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jun 2026 06:34:28.6525 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0762d25c-5396-498c-1b85-08dec13a29cf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6005 Firmware can consume the S5_RESET_STATUS from the FCH register and the OS may see an incorrect value at the time of boot on certain platforms. Vilas, Yazen noted that S5_RESET_STATUS is also populated in ACPI PHAT on newer AMD platforms which is more reliable than the status from the FCH register. Use the S5_RESET_STATUS from the ACPI PHAT which is described in the "Platform Health Assessment Table (PHAT)" section of "AMD Family 1Ah Models 00h–0Fh and Models 10h–1Fh ACPI v6.5 Porting Guide" [1] on supported platform and fallback to the legacy FCH path if the PHAT record is not found. Unlike the FCH register, PHAT only provides a read-only value which cannot be cleared once consumed and will persist across kexec boots. Link: https://docs.amd.com/v/u/en-US/58088_0.90_PUB [1] Suggested-by: Vilas Sridharan Suggested-by: Yazen Ghannam Signed-off-by: K Prateek Nayak --- arch/x86/kernel/cpu/amd.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 2f8e8ff2d000..d3dee7fd4c51 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only #include +#include #include #include #include @@ -11,6 +12,8 @@ #include #include #include + +#include #include #include #include @@ -1342,8 +1345,21 @@ static const char * const s5_reset_reason_txt[] = { [31] = "a software sync flood event occurred", }; +/* + * "AMD Family 1Ah Models 00h–0Fh and Models 10h–1Fh ACPI v6.5 Porting Guide" + * specifies the vendor-specific GUID of FCH::PM::S5_RESET_STATUS record as + * "1f425831-da46-4f65-9296-3c4d44c387ab" alongside the format of reset reason. + */ +#define S5_RESET_STATUS_GUID GUID_INIT(0x1f425831, 0xda46, 0x4f65, 0x92, 0x96,\ + 0x3c, 0x4d, 0x44, 0xc3, 0x87, 0xab) + static __init int print_s5_reset_status_mmio(void) { + struct reset_status_record { + struct acpi_phat_vendor_element header; + u32 s5_reset_status; + } __packed *record; + guid_t guid = S5_RESET_STATUS_GUID; void __iomem *addr; u32 value; int i; @@ -1351,6 +1367,23 @@ static __init int print_s5_reset_status_mmio(void) if (!cpu_feature_enabled(X86_FEATURE_ZEN)) return 0; + record = (void *)acpi_phat_get_vendor_reset_reason(&guid); + if (!IS_ERR(record)) { + bool record_valid = false; + + /* Sanity check before using the parsed record. */ + if (record->header.length == sizeof(*record)) { + pr_debug("Using ACPI PHAT record for S5_RESET_STATUS\n"); + value = record->s5_reset_status; + record_valid = true; + } + + acpi_phat_put_vendor_reset_reason((void *)record); + + if (record_valid) + goto parse_status; + } + addr = ioremap(FCH_PM_BASE + FCH_PM_S5_RESET_STATUS, sizeof(value)); if (!addr) return 0; @@ -1374,6 +1407,7 @@ static __init int print_s5_reset_status_mmio(void) iowrite32(value, addr); iounmap(addr); +parse_status: for (i = 0; i < ARRAY_SIZE(s5_reset_reason_txt); i++) { if (!(value & BIT(i))) continue; -- 2.34.1