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Thu, 4 Jun 2026 04:43:49 -0700 From: Zhi Wang To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Zhi Wang Subject: [PATCH 0/9] gpu: nova-core: boot GSP with vGPU enabled on Date: Thu, 4 Jun 2026 14:43:30 +0300 Message-ID: <20260604114339.1565660-1-zhiw@nvidia.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC1:EE_|DS0PR12MB7607:EE_ X-MS-Office365-Filtering-Correlation-Id: db5c6054-6278-49e9-4c73-08dec22e9a8d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|82310400026|376014|36860700016|6133799003|13003099007|3023799007|56012099006|18002099003|11063799006; X-Microsoft-Antispam-Message-Info: rn39DoyPQhbAagKWB6fOwx/If+qddZSXivNMG6NVWn8urJ18tlPiVLx5VexPbEDeNs3bC3jWJLMW7G9O1univJtpFHvAOqbHQOM5O6oRXKoFdsRXVILkfwMPpFP/AQ6JTth6reOqwbR59Tu4lcvA/KPAwlJtkYzN7wyvo+6Sq611HrCKVho3f+2/5ZJV39E4fyWM2ouxZ2naxkmwSm0SGqAkNzk6C4Gjub+4YpzVkVISrFd3rHnmd5/A2umV+QiPXDXHp28gIu7gB8cMfTiPF0eFvI9J403Da3+fIGntE73H3QoRobUesC3JFWw1Dc0RicBOEz58BKD2qWW0gftYWPphffTEztHAfU4KpM3YR8NAD6DwwbDN0z+BW2Nyikc89mA2xCCu9PhahcqNeaNjW1eKLlN5/s+QGRPf4z/1kdQlAAPHfApYnirWfJeFU0m/hxRbqR82uqeNS4+T5LOhAQSi0seuzHf+/4QSqjJZlrFiWkLgfpUFvajOIAqz1b01DCdrs7zPEHb4IQYuDDvqqAcwVhFQPd35eZUmEFM92ST/f5UlvgmZdKENuR8UutNUvhCBiE0sWFzrFFN+KK1mlFCvB3eZCl+h8jhFykF2YrJj7hm9VqPbD/XPkj3h9xYgWPGK+C4r2nFecE0/7eoElG6Ds6WV+qEccQ7KJRyAJNBcODFsdpApv9fcAJ5/riONt8hRwCZSJ0tYYk00txvQIWCo07vPyQqJyCNUABTKDiQ= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(82310400026)(376014)(36860700016)(6133799003)(13003099007)(3023799007)(56012099006)(18002099003)(11063799006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MAJfwKNCylbQQk3Q63krmC2KB/zZKqW8he68H02tOn7k9Weshq2AfSf48G7qiiGrTNV/057b2OFrEC1UN4q3uhbSiviPj2ZRWfghVOS8eIzwZotiNEhS5G3K0QNRr8dh+3UxU71oqnAbRfijz9FAQgK6Xl0p5/n08lk/sZsiHhQlpSYzAZ6wb2XZk7eEwsh+UYJnVAZrhIJlh95NE2MUKrWnWSlcptSfLbwAzGVoOeXoNbcRJl/kphKKDqeNBVUuZca27pU/zf5C+AQ7ImzM8i35lmbNlLxNSZfVGuYxna7idtykB1lwoI2ZI74NhER4EB7pNvQ2TOBBmI1ZnOymml9EK/N3NToOfYI8TDO0g2FpLVlmNlq+MNzLZAGMe6+GJXlmZSgipDXX8DJJkS5xRTYNTpjK2+9vYacm0+heDxdseTV4FcUaPZYOR5nUFszD X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2026 11:44:14.8291 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: db5c6054-6278-49e9-4c73-08dec22e9a8d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7607 Booting up GSP with vGPU enabled is part of the first milestone (M1) together with rust fwctl abstraction [1] and nova-core fwctl driver [2] for upstream vGPU support, allowing us to validate the basic GSP boot flow with vGPU enabled, upload vGPU types even before the remaining nova-core dependencies are ready. The nova-vgpu WIP patches for all milestones can be found at [3]. v3: - Consolidate GSP boot parameters into GspBootContext struct, passed through the HAL trait methods instead of individual arguments. - Add vGPU preludes patch (VgpuManager, Architecture::supports_vgpu, GspBootContext fields) as preparation for the vGPU boot changes. - Rebase on top of the latest drm-rust-next. Dropped patches: Dependencies still in progress: - "populate GSP_VF_INFO when vGPU is enabled" - depends on the ExtSriovCapability abstraction [4] which is still under review and Gary's on-going io projection work [5]. Ada specific: - "introduce vgpu_support module param" - select vGPU support based on module params. - "load the scrubber ucode when vGPU support is enabled" v2: - Adopt early-return style (Dirk). - Add #ifndef CONFIG_PCI_IOV helper to fix compilation when CONFIG_PCI_IOV is disabled, per (Alex). - Change return type from Result to Result to match the PCI spec field width, avoiding try_from at call sites. - GspVfInfo changed to tuple struct (Alex). - Use unconditional constructor with Option wrapping instead of bool parameter. (Alex) - Use full initialization expression instead of mutating a zeroed value. - Use .chain() pattern in GspSetSystemInfo::init() for optional vGPU info. (Alex) - Eliminate all magic numbers: add vf_bar_is_64bit() and read_vf_bar64_addr() to ExtSriovCapability using PCI bindings constants (PCI_BASE_ADDRESS_MEM_TYPE_MASK, etc.). - Use KVec for dynamic registry entry construction instead of hardcoded array (Timur, Joel, Alexandre). - Replace magic numbers 32/48 with named binding constants MAX_PARTITIONS_WITH_GFID_32VM / MAX_PARTITIONS_WITH_GFID from OpenRM (Alex). - Use read_poll_timeout() instead of single read for scrubber completion check (Joel). - Use dev instead of pdev.as_ref() in dev_dbg! (Dirk). - Change scrubber trigger condition from vgpu_requested to fb_layout.wpr2_heap.len() > SZ_256M, checking actual heap size instead of vGPU flag. (Alex). [1] https://lore.kernel.org/rust-for-linux/20260217204909.211793-1-zhiw@nvidia.com/ [2] https://lore.kernel.org/rust-for-linux/20260305190936.398590-1-zhiw@nvidia.com/ [3] https://github.com/zhiwang-nvidia/nova-core/tree/zhi/nova-vgpu-wip [4] https://lore.kernel.org/rust-for-linux/20260409185254.3869808-1-zhiw@nvidia.com/ [5] https://lore.kernel.org/rust-for-linux/20260421-io_projection-v2-0-4c251c692ef4@garyguo.net/ Zhi Wang (9): rust: pci: expose sriov_get_totalvfs() helper gpu: nova-core: factor out common FSP message header gpu: nova-core: return FSP response buffer to caller gpu: nova-core: read vGPU mode from FSP via PRC protocol gpu: nova-core: add FSP and PRC protocol documentation gpu: nova-core: consolidate GSP boot parameters into GspBootContext gpu: nova-core: add vGPU preludes gpu: nova-core: set RMSetSriovMode when NVIDIA vGPU is enabled gpu: nova-core: reserve a larger GSP WPR2 heap when vGPU is enabled Documentation/gpu/nova/core/fsp.rst | 142 +++++++++++++++++ Documentation/gpu/nova/index.rst | 1 + drivers/gpu/nova-core/fb.rs | 17 +- drivers/gpu/nova-core/fsp.rs | 207 ++++++++++++++++++++++--- drivers/gpu/nova-core/gpu.rs | 38 ++++- drivers/gpu/nova-core/gsp.rs | 27 ++++ drivers/gpu/nova-core/gsp/boot.rs | 60 ++++--- drivers/gpu/nova-core/gsp/commands.rs | 93 +++++++---- drivers/gpu/nova-core/gsp/fw.rs | 16 ++ drivers/gpu/nova-core/gsp/hal.rs | 23 +-- drivers/gpu/nova-core/gsp/hal/gh100.rs | 22 ++- drivers/gpu/nova-core/gsp/hal/tu102.rs | 31 ++-- drivers/gpu/nova-core/mctp.rs | 3 + drivers/gpu/nova-core/nova_core.rs | 1 + drivers/gpu/nova-core/vgpu.rs | 47 ++++++ rust/kernel/pci.rs | 12 ++ 16 files changed, 608 insertions(+), 132 deletions(-) create mode 100644 Documentation/gpu/nova/core/fsp.rst create mode 100644 drivers/gpu/nova-core/vgpu.rs -- 2.51.0