From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F4D93F0A99 for ; Fri, 5 Jun 2026 10:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780654760; cv=none; b=WpOY65sBRs7aAUnCorZtwGXltg5GJc2zmeFmnHK83vdYhtiM4OpSGI1hVbN11ZFastBYGx1wWLCV7yn/5EViqfd4r8U0vgotxyCzifNW8Pqhy/M9BwvrqtcnlqIIN/+q4iAE/7qsy3b4pLmreCnw+cSh4eTztE27Ehvim4tKe44= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780654760; c=relaxed/simple; bh=UjONg0NYj4XKMunIFJbINoDK3VSOgIFWYIBOvuNak5g=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=mBA2qwyNEkFKxFcb605uuNlVCLz0vHy/lBJp51bWLdmta0m4+9KXIo+M063y3FuJt4vnAX3hY2ZNQG/8SKlqdxIh25Xdchw5UaUbDpSmHeMnpgbmO3pxyqYsIOqlIiMLokQRonFctTYWYRsOdwyhWkKqI7Hhshdm5FvJCV4vdzA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=CoTPCZNX; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ey9U8ra7; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="CoTPCZNX"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ey9U8ra7" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6555CUkl2667412 for ; Fri, 5 Jun 2026 10:19:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=YdRn4DRbFufW0fmv7Xxdna 0Xs07PVl1QBs1/OWzN90w=; b=CoTPCZNXVLY22xU7IlGWff9+nkN8NSABuqQK7T yhjH5HRfRUAC2nU5amDTJOTJ8/X0cepcrQnVE6naN3qswU2gy/9MW/sYS6sFkSNb k+mEyavpP9eznk+hA/3jVTMMVFf4IBPR4rqLBxNSPDXMVNqPVwN8RCWZP6U2KrBQ DWzeRwu8FgdX+upf4gWBXo4U4zcUj3+6MlD+oA+ZYF4aODv3rf4HV1ljjnVPMLDf danFRBdDSE19VvaI3aKe/oX/+Dfr0AiFbR82LXwJVcC8N4X5AMj3I8m5Yrfwgjhz Ejehl2Yxz9mHIaMac+1UCzRDut8xVTBdP2BbEidMeb4R3x2A== Received: from mail-pl1-f200.google.com (mail-pl1-f200.google.com [209.85.214.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ekemyueyw-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 05 Jun 2026 10:19:16 +0000 (GMT) Received: by mail-pl1-f200.google.com with SMTP id d9443c01a7336-2c0b35fa876so20541595ad.1 for ; Fri, 05 Jun 2026 03:19:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780654756; x=1781259556; darn=vger.kernel.org; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:from:to:cc:subject:date:message-id:reply-to; bh=YdRn4DRbFufW0fmv7Xxdna0Xs07PVl1QBs1/OWzN90w=; b=ey9U8ra7sWfiTWZ7z0C/NJc2YafnC3Sb5hdEGYL5J/VhzDP5M8+T3lRZbADEVlvCv5 mXecLIf1SaMTNPUtfq/dMSk9nO0ZWRjFxET8cl6VPvftIOEwKs9SdtMiTQQ5223j0ESS veRWjOo8XoQy5L8dBTkts2petY4wLnvmblVRLRv/yyKelz17CRv3SojUrK3w76gdrd2J w/8yCs1CufJcTDQQzEwYAuu4NWAfbV7vV0FIsLgU97Hj09zqAR9W35OYVjyVmohTC6lJ g72cHn7tNxl+ReJI7OFq/BAMeYz8B8NWOV05UoWUfDqyiawvVuJyQmNRZj7pLJo0/i98 kSPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780654756; x=1781259556; h=cc:to:content-transfer-encoding:mime-version:message-id:date :subject:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=YdRn4DRbFufW0fmv7Xxdna0Xs07PVl1QBs1/OWzN90w=; b=sqeMgDw/RH/c80lWH1/qXMJG56HDnnJcJoAONpvc8jkH5geYAQ4OHnBUDrxitkZnQg +tOGF3diXxIHRv9D27uBbfil26b0HX7OXeemUS5+YPPMx6LW0YsnSyPs9Aq8QXMQy8Nl TkEb6GAvf2hD33pEwB/f9gcGztwKzQGE5hDFWLwsVdjYQyUSX5TCq0S4KXBvYrrA3IgP 83n7yhnN1DdvGukGLuSIPJsKsHxKO4g6UxFuNKnjGu0Uii54pbxhc9I09oIsibbBWY+B /GZx0z5eWjiqVsoNQJtWlAn4CSs8DX0bK2rUmW32uyzzck4eWDH2J0X7IWeShIdShkwH ALsA== X-Forwarded-Encrypted: i=1; AFNElJ/cVwqn3JoNZmeZE2jdbS+OpG1v0nt14H9e3fYMYdxYk/t630PPFt5fC3PISGE9XZeAgV8VUQ0sPilASSY=@vger.kernel.org X-Gm-Message-State: AOJu0Yxpw3JsFdzkpcgw2YOn+XBf2mQcTrhgDrwzXOaGEax88CuP572y bytt3l/+zrb9JlhZSiKqfmYdZGItNFOUwoVl+QZT7tvjod1jqbmcEAmVisCk2G0cQJIDPKwpk+u x86yDdStcZrqDsjnORkZ31xxJrzsywYDwSiWTBUu5MRsyeYnoGwxW6vrmpiGSFLnQ1Xw= X-Gm-Gg: Acq92OHHuFkhPZDSQzhEzbxi/KJkhSTAKgHsi56AQC582+ly91mE+UYDe5k0msjZw4g WFOdgCTNJ4+sx0ywYGsugvDvuahNV/jBbTkKjlmWfkcPH7TqxjysL3wwJtWy7pbGKTM7mgz/AB4 j3Cd4eNed475olU6P4n3Gux5ovMNQeHg3qBiglSehClPV0QqVgOxZ863rOMQbfEOwTNwwf/6Jay K8zAI91c5Uvxi9xblgDyfvZcrKnVBA0GX9JtOn3obJh0+awNmeuPDu9U5rJhibUYHp2QwuKXF0Y K7zNxfquowIrMs7YV5890Ki4vt/ul5HdS+Ak8CU3ZfYUqMmRJA0X5uohcqghP80mA/BgICoIah0 K00y09K23p7A4yoE3uf1IXsc87KvcbrwgKWOVizQWx66GxXnk68BkNiNF5WU= X-Received: by 2002:a17:902:d58f:b0:2bf:195d:21d2 with SMTP id d9443c01a7336-2c1e7e44e91mr31358635ad.16.1780654755816; Fri, 05 Jun 2026 03:19:15 -0700 (PDT) X-Received: by 2002:a17:902:d58f:b0:2bf:195d:21d2 with SMTP id d9443c01a7336-2c1e7e44e91mr31358275ad.16.1780654755335; Fri, 05 Jun 2026 03:19:15 -0700 (PDT) Received: from hu-naala-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c164fa0236sm89741445ad.33.2026.06.05.03.19.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 03:19:14 -0700 (PDT) From: Nabige Aala Subject: [PATCH v3 0/3] Add Shikra (QCM2390) display support Date: Fri, 05 Jun 2026 15:48:50 +0530 Message-Id: <20260605-shikra-display-v3-0-9846ba5fe635@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAIqiImoC/3XNQQ6CMBAF0KuQri0phVBx5T2Mi2kpUkWKHWgkh Lvb4sZE3Uzykz/vLwS1MxrJIVmI096gsX0I+S4hqoX+oqmpQyac8ZKVLKfYmpsDWhscOpgpE6I UnO0bqBgJT4PTjXlu4On8zjjJq1ZjVGKjNThaN2+LPou9v7jPKKOgQWWyKhoAcbSI6WOCTtn7P Q2HxA3PP5XiS+FBkXlAuCyFrtUPZV3XF6jbTxkLAQAA X-Change-ID: 20260603-shikra-display-07767208fa90 To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Loic Poulain , Bjorn Andersson , Konrad Dybcio , Will Deacon , Robin Murphy , "Joerg Roedel (AMD)" Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Nabige Aala , Dmitry Baryshkov X-Mailer: b4 0.16-dev-d5d98 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780654747; l=3346; i=nabige.aala@oss.qualcomm.com; s=20260520; h=from:subject:message-id; bh=UjONg0NYj4XKMunIFJbINoDK3VSOgIFWYIBOvuNak5g=; b=NYZsTfhD6L1pZkrKqjY12HiGTIOPAad7elMOIEmgc5l650WfUBoPQwTaiYI4OYgsjDKjhuKBL jCLt2KM/JUJAy+tdw3EdLXgPUp6qTh8OMonqEGpoxLFIK4lrDHSxFSQ X-Developer-Key: i=nabige.aala@oss.qualcomm.com; a=ed25519; pk=PYHJom8sPos1IGkrbCCsWiE7XTBQrQZd9jzAo051tgw= X-Proofpoint-GUID: FWjQWA5aMt4zmEwu1L9YtiXzXq56xbd- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA1MDA5OSBTYWx0ZWRfXwSFtdG0UKMJT E60TjKzbTFsLZOfcYb04uU+f74mb30+tf+DN4yHPcRvl+88ceZ4I/8UCwOvOG40L8QmUv0lEX9j lzQ5ISuaiqTi0vvO+vLb9h6Y7dipVsmzP0o61Un1/WDqBZTjnpkfmlteo6djyC2ZWPYk/FuBZvm YsbKAiUnXGNrsyfUymPKN/hHv7KC77CXG/amwf6JWK2QRQZmt2/onhPu7Npjb++sHdk3h+X6XMG oSLg+Quaidqnc9mlDNGycMcsyWDZ4MEMednuQmSvrvercCqAw1sw4PxLEFnQVX222NsLdLf6g97 uDJQYbd0cfwDjABk3iScq65fIOklx7dWbllGTiYJTygxQaV4QPXtuFThqH9GFSFZWktXMHcP5Oc 6b2D5FaW3Vg7ohA81566A0EVNsSavYxvpv5+pNf/E4DUjAN/lELbTrlivkl9CYrIBAs/A5T0ALu niQm+V46BP29Byqe7aA== X-Authority-Analysis: v=2.4 cv=K/wS2SWI c=1 sm=1 tr=0 ts=6a22a2a4 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=bC-a23v3AAAA:8 a=EUspDBNiAAAA:8 a=_or6NCU1o4AAqT2-bvQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=FO4_E8m0qiDe52t0p3_H:22 X-Proofpoint-ORIG-GUID: FWjQWA5aMt4zmEwu1L9YtiXzXq56xbd- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-05_01,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 suspectscore=0 impostorscore=0 spamscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606050099 Shikra (QCM2390) is a Qualcomm SoC based on the QCM2290 family that reuses the same MDSS/DPU 6.5 hardware as QCM2290. This series enables the display subsystem for Shikra by adding DT binding updates for MDSS, DSI controller and DPU, arm64 defconfig enablement for the ILI7807S DSI panel, and UBWC configuration mapping Shikra to qcm2290_data. Driver and SMMU support are covered by the existing qcom,qcm2290-mdss fallback compatible string — no separate drm/msm or IOMMU patches are required. Tested on Shikra CQM EVK board with ILI7807S DSI panel. Display pipeline probes cleanly and panel renders correctly. Signed-off-by: Nabige Aala --- Nabige Aala (3): dt-bindings: display: msm: qcm2290: Add Shikra MDSS arm64: defconfig: Enable ILI7807S DSI panel driver soc: qcom: ubwc: Add Shikra UBWC config Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml | 7 +++++-- Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 22 +++++++++++++++------- arch/arm64/configs/defconfig | 1 + drivers/soc/qcom/ubwc_config.c | 1 + 5 files changed, 26 insertions(+), 9 deletions(-) --- Prerequisite-Message-Id: <20260518-ili7807s-panel-v1-0-d7b048163b1c@oss.qualcomm.com> --- Changes in v3: - Use a fallback compatible chain for qcom,shikra-dsi-ctrl in dsi-controller-main.yaml instead of a standalone enum entry, with qcom,qcm2290-dsi-ctrl and qcom,mdss-dsi-ctrl as fallbacks - Replace oneOf in qcm2290-mdss patternProperties DSI compatible with contains: qcom,qcm2290-dsi-ctrl to avoid duplicating full chain validation already handled by dsi-controller-main.yaml - Drop unnecessary select: block from qcom,qcm2290-mdss.yaml; default dt-validate compatible matching is sufficient - Remove self from qcom,qcm2290-mdss.yaml maintainers list - Link to v2: https://patch.msgid.link/20260604-shikra-display-v2-0-b3c1b2b67edc@oss.qualcomm.com Changes in v2: - Drop drm/msm/mdss: Shikra support patch; driver reuse is handled via the qcom,qcm2290-mdss fallback compatible string (per Dmitry's review) - Drop iommu/arm-smmu: Shikra SMMU client table patch; not required with fallback compatible approach - Fix UBWC config to map qcom,shikra to qcm2290_data instead of no_ubwc_data; Shikra shares UBWC support with QCM2290 - Refactor series from 5 patches to 3 patches - Link to v1: https://patch.msgid.link/20260603-shikra-display-v1-0-aeac1b94faa7@oss.qualcomm.com --- Nabige Aala (3): dt-bindings: display: msm: qcm2290: Add Shikra MDSS arm64: defconfig: Enable ILI7807S DSI panel driver soc: qcom: ubwc: Add Shikra UBWC config .../bindings/display/msm/dsi-controller-main.yaml | 4 ++++ .../bindings/display/msm/qcom,qcm2290-dpu.yaml | 7 +++++-- .../bindings/display/msm/qcom,qcm2290-mdss.yaml | 22 +++++++++++++++------- arch/arm64/configs/defconfig | 1 + drivers/soc/qcom/ubwc_config.c | 1 + 5 files changed, 26 insertions(+), 9 deletions(-) --- base-commit: 3a34f9c13cc0688f8db2a0db8506bf8c0d90737d change-id: 20260603-shikra-display-07767208fa90 Best regards, -- Nabige Aala