From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7369440759C for ; Fri, 5 Jun 2026 06:29:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780640971; cv=none; b=ETxXXhnP8JI195wwnqhiOTrYs8KcXak2vswU5JSaYzcsj2B10nbaLDffTDvzF42xAALmbANYcMQkkGOOMHB1aExhvT1jURGRS0+9M0zSpfGwPEcdON4byx6xsCNmzsMNmMgKmtH7GK9vHL/gpzPfNCR/WVzSnBK8ieBa90iFGMY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780640971; c=relaxed/simple; bh=xtNM89rtJQ+/7mpEoXGRfWZLOkGhzco0rN4pEvdsp24=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uQX9vUR02jRd7lpebDTjSGTfT7vTQm2XPPNT89BgaVEkTjSblaxoYc+ike5r9socLH8L45OjzbY3vXnrpQJ0C6pGzmU0+IHirU5F9ZKLJFe5oa9Mgs4/reIzK/NohrKskDYof5+jerkhA4U6epx3Ynok1B/qTvwnUsCogM2Ytl8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=bMvBgj/p; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="bMvBgj/p" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-45ee5cdbd28so1646708f8f.1 for ; Thu, 04 Jun 2026 23:29:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1780640969; x=1781245769; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mclTzGDSUSSOxUF84WDRq2fQHJYlVhvXl7S+nUy/YMg=; b=bMvBgj/pGZtdcTUXDiQ1saVOyomEZ9m/Zw8ThEkNA25noByRqDsHipZW6m5ax3Czns /VxFt3d/GlXKy9AS2FFqKuu9e2up5GZA8nZk6mvL+5VkzoTRplJpc/6QwNC3/gfZ9wP0 qC5T6lqFb1zkbuxyVZ5K9+/vZw6T1jS7MXDAU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780640969; x=1781245769; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mclTzGDSUSSOxUF84WDRq2fQHJYlVhvXl7S+nUy/YMg=; b=cJAf4AmorABtY1wA9v4V94EHa4yf/iShqgL0xZ0CV+x9+ELXKPA5oAprWN3rMcEsVa piK+7vBvjsPXjQzFWPtRKwaP9zUQoXAE1k2kJ337sNVwBciVoN2Kr7eVilUfnEZ0/WYR uK5wX6SF168DdS/dijsWnIY+Ic4I9MMbyjmGouGGb4zd7ICCV0GY4oI9LoC2VYVyzsze AwoEw5H5VwkS6b/9A2NBJlg45YkC/It5QtKlbHljacoWTEF7fsLDkODbYV56I6jEYcQq LwDib0a1RgmMZGm4zswHeu00qyvooGAM2maoujrfra1ZC/PtmMQnT7xb1i/SG57hX++m SdrA== X-Gm-Message-State: AOJu0YwJ3emtzd9YuCgxvicP6FEGSSrxW45VW1zlFKHhc6N5VAsBC6+y 2+8VwTyV4lM2Bc+SpyCQurmdrZ/RRCxUXndccIVONso+8oZhW3IU66emGMaxf42Y4feyM5gE9DN nvzvw X-Gm-Gg: Acq92OHVUYf0pfgUqLmIkkhzpLXtb0fGmvNslQNMrEiuHKnvR9GnHHXa6GN2Ez5u/1M ALaGRkvDziLtB4zWX54m7EnRDJhRMNLtQeGqkwBQFkhm1x6H4AzE15ErlbLBlJnGl1GlT4VGG7f clpkWZuMt5UUxDLcW9RAZCSStWZmF7MrSWrJbfBFaOPy5zUklb9B/C+WQStiXe6g6A+q7hor/gu DpjUpivZZz9ADM7Tm8wdGsf5dFxADl1HJM4lF/2TJsWHE99MVV/7ttgUq1TXzenFtLk10UtbM4J Rtl/bWhyB3dWj6Jk/r9yE3x+nF6Y59X7vyCnl2ymTaXgAOmysrV7UyDDXzsCoCzq96nD5kwNX8B +DMeZ30AJ//otk4GKNgIZNUEFXV2j3Xji2CS62fRo0JHknuYttA/J8ODG8dj7iPloDJzzsX+j6m ZAy+r2ShceNSyRz1vz++50lw6ZL2e2D4N1m9+jDVvkWIvpPDpc4zm3qniEE9y0Bct27Eg0tG65t vmGomYDTc9h8+cuvau5O79IrZUd3y21Fd2ND0RweohehID779E4Cm8Lrk5vm7a6yGsow1n18eKI FxC21tHciiDPpH0nS4Q4Vw0wuA0EdYEVuHA= X-Received: by 2002:a05:6000:400e:b0:460:18cf:d49b with SMTP id ffacd0b85a97d-46032dabbc0mr1671442f8f.15.1780640968980; Thu, 04 Jun 2026 23:29:28 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.homenet.telecomitalia.it (host-82-48-44-238.retail.telecomitalia.it. [82.48.44.238]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4601f344148sm23022648f8f.19.2026.06.04.23.29.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jun 2026 23:29:28 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: domenico.acri@engicam.com, francesco.utel@engicam.com, michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v3 12/14] arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM Date: Fri, 5 Jun 2026 08:27:40 +0200 Message-ID: <20260605062900.368376-13-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260605062900.368376-1-dario.binacchi@amarulasolutions.com> References: <20260605062900.368376-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Support Engicam MicroGEA-STM32MP257 SoM with: - 8 GB eMMC Flash - 2 GB LPDDR4 DRAM The SoM also provides an Ethernet MAC, but Ethernet support is not enabled at this stage due to a known silicon limitation documented in [1]. This corresponds to section 2.21.2 ("ETH1 RMII mode could have CRC errors"), where CRC errors may occur in ETH1 RMII direct mode when directly connected to I/Os. The workaround requires use of the Ethernet switch (ETHSW), which introduces additional DT bindings and topology complexity. This is intended to be addressed in a separate patch series. [1] https://www.st.com/resource/en/errata_sheet/es0598-stm32mp23xx25xx-device-errata-stmicroelectronics.pdf Signed-off-by: Dario Binacchi --- Changes in v3: - Fix a typo in the URL .../dts/st/stm32mp257-engicam-microgea.dtsi | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi diff --git a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi new file mode 100644 index 000000000000..67be66cd1930 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2026 Amarula Solutions, Dario Binacchi + * Copyright (C) 2026 Engicam srl + */ + +/dts-v1/; + +#include +#include "stm32mp257.dtsi" +#include "stm32mp25xf.dtsi" +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxai-pinctrl.dtsi" + +/ { + model = "Engicam MicroGEA STM32MP257 SoM"; + compatible = "engicam,microgea-stm32mp257", "st,stm32mp257"; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; + }; +}; + +&scmi_regu { + scmi_vddio1: regulator@0 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + scmi_vddcore: regulator@b { + reg = ; + regulator-name = "vddcore"; + }; + scmi_v1v8: regulator@e { + reg = ; + regulator-name = "v1v8"; + }; + scmi_v3v3: regulator@10 { + reg = ; + regulator-name = "v3v3"; + }; + scmi_vdd3v3_usb: regulator@14 { + reg = ; + regulator-name = "vdd3v3_usb"; + }; +}; + +/* eMMC */ +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width = <8>; + vmmc-supply = <&scmi_v3v3>; + vqmmc-supply = <&scmi_vddio2>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; -- 2.43.0