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[82.48.44.238]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4601f2dcb13sm24785883f8f.2.2026.06.05.05.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2026 05:20:03 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Amelie Delaunay , Arnd Bergmann , Bjorn Andersson , Christophe Parant , Conor Dooley , Dmitry Baryshkov , Eric Biggers , Geert Uytterhoeven , Himanshu Bhavani , Huang Shijie , Krzysztof Kozlowski , Krzysztof Kozlowski , Luca Weiss , Maxime Coquelin , Michal Simek , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 00/14] arm64: support Engicam MicroGEA-STM32MP257-RMM board Date: Fri, 5 Jun 2026 14:18:11 +0200 Message-ID: <20260605121957.78409-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds initial support for the Engicam MicroGEA-STM32MP257-RMM board based on the MicroGEA-STM32MP257 SoM. The support includes device tree descriptions for both the SoM and the carrier board, together with the required pinctrl definitions for the peripherals used. The series also updates the arm64 defconfig accordingly. Changes in v4: - Drop inclusion of stm32mp25xf.dtsi from stm32mp257-engicam-microgea.dtsi Changes in v3: - Add power-domains property in the SDMMC2 node. - Drop patch "arm64: defconfig: cleanup the defconfig" Changes in v2: - Add Acked-by of Conor Dooley for patch 0/1 "dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257-RMM board" - Add resets property to dts CAN node. Suggested by Sashiko. - Drop the clocks property from the sai1 node in stm32mp257-engicam-microgea-rmm.dts to avoid overriding the peripheral bus clock reference defined in the base SoC device tree. Suggested by Sashiko. - Reference the existing labeled nodes directly at the root level using &sai1a and &sai1b in stm32mp257-engicam-microgea-rmm.dts instead of redefining the entire node structure and redeclaring the labels. Suggested by Sashiko. - Drop the #clock-cells property from sai1a and remove the reference to sai1a from the clocks array in sai1b, relying strictly on the st,sync property to handle internal synchronization. Dario Binacchi (14): dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257-RMM board arm64: dts: st: add SDMMC2 support on stm32mp25 arm64: dts: st: add CAN1 support on stm32mp25 arm64: dts: st: add i2c1 pins for stm32mp25 arm64: dts: st: add ltdc pins for stm32mp25 arm64: dts: st: add can1 pins for stm32mp25 arm64: dts: st: add pwm2/pwm4 pins for stm32mp25 arm64: dts: st: add sai1 pins for stm32mp25 arm64: dts: st: add sdmmc2 pins for stm32mp25 arm64: dts: st: add spi1 pins for stm32mp25 arm64: dts: st: add usart1 pins for stm32mp25 arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM arm64: dts: st: support Engicam MicroGEA-STM32MP257-RMM board arm64: defconfig: enable configs for Engicam MicroGEA-STM32MP257-RMM .../devicetree/bindings/arm/stm32/stm32.yaml | 7 + arch/arm64/boot/dts/st/Makefile | 1 + arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 328 ++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp251.dtsi | 16 + arch/arm64/boot/dts/st/stm32mp253.dtsi | 16 + .../st/stm32mp257-engicam-microgea-rmm.dts | 319 +++++++++++++++++ .../dts/st/stm32mp257-engicam-microgea.dtsi | 63 ++++ arch/arm64/configs/defconfig | 4 + 8 files changed, 754 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi -- 2.43.0 base-commit: ddd664bbff63e09e7a7f9acae9c43605d4cf185f branch: stm32mp257d-microgea