From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B9DD311959; Sun, 7 Jun 2026 18:36:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780857382; cv=none; b=EZzFC6MaXj4NlQfahsyJ3FG0dV8p0oU0kv6kTO2EqoDWWcxMl7EKl8KMWuhlsILOn/tkK/9Lv5wB67+eR7HkAtg0awmuysALjGR9mufi7w9RKY6yOpwAz3VL7BQsBTLNvsZ0VSb/wF6FOXCt72LMgLcaohm2WNdPntvjKxZ0KcM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780857382; c=relaxed/simple; bh=n3LTctmLiarUDFk7jU/nt7slraWWbdw+71Ep9d7Y+t8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=G2a3J+v8nEHGF2JCH8pgT4ZUV9My2jJqAUA89EJ4P/fu+amizUPngyvU2Eo04V/V/UIj1nQw2ltZieu3T0wgQ+oXTOaty7B4jxOWm/SWrV/pPRpjXVvZvRDxB7QFXp13REw+wwMsS6KLIDaWi4xNpxvwLHHbeG25bDNgHa7vGUQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kNH/sLf0; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kNH/sLf0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780857381; x=1812393381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=n3LTctmLiarUDFk7jU/nt7slraWWbdw+71Ep9d7Y+t8=; b=kNH/sLf0mWxeqyRWtJTh1KVbpRc5YkiMYwv00afWQN3IRkIzbqJV30aa cxhsODn3nqAC95+naK2hegPgfcj3tzz3ruPlep5Dwx7Cj+5K4/hGGW1Cy FVlINXUom+kS76LJJ4Bef0WtsPr4Am98IORzxU1597NXdO11CEknxzmeR RbQ1z7hjv1k/U4GZ5D2FXH138ar5dBVzhGhjjB6fzM1Gp65Mg3TFpaNKr Z0c/FXpYLagX2CsOfIcN6WJhq/es0nq2vWd+TZFsnt1N0cKxtmFG/gdrl 1iIINtyNG6x/1OYu0q5Gjw98WXPUOyx7KCxLCsf791vFocs45pHoQSo03 Q==; X-CSE-ConnectionGUID: eiCQ5+13S3e26bEw8emPDA== X-CSE-MsgGUID: 2m/0/M1OQp2nXbluMTT4HQ== X-IronPort-AV: E=McAfee;i="6800,10657,11810"; a="81602148" X-IronPort-AV: E=Sophos;i="6.24,193,1774335600"; d="scan'208";a="81602148" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2026 11:36:21 -0700 X-CSE-ConnectionGUID: Cd0eK6UTQFaNxiXZE/sFcQ== X-CSE-MsgGUID: 2g2rt43GQoWa/auEgLcXPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,193,1774335600"; d="scan'208";a="245171471" Received: from gklab-003-001.igk.intel.com ([10.91.173.48]) by orviesa008.jf.intel.com with ESMTP; 07 Jun 2026 11:36:15 -0700 From: Grzegorz Nitka To: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, poros@redhat.com, richardcochran@gmail.com, andrew+netdev@lunn.ch, przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com, Prathosh.Satish@microchip.com, ivecera@redhat.com, jiri@resnulli.us, arkadiusz.kubalewski@intel.com, vadim.fedorenko@linux.dev, donald.hunter@gmail.com, horms@kernel.org, pabeni@redhat.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, Grzegorz Nitka , Aleksandr Loktionov , Jiri Pirko Subject: [PATCH v14 net-next 09/13] dpll: allow fwnode pins to attempt state change without capability bit Date: Sun, 7 Jun 2026 20:30:41 +0200 Message-Id: <20260607183045.1213735-10-grzegorz.nitka@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260607183045.1213735-1-grzegorz.nitka@intel.com> References: <20260607183045.1213735-1-grzegorz.nitka@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Pins registered with an fwnode may have .state_on_dpll_set implemented without advertising DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE upfront. Requiring the bit for fwnode pins ties firmware description to driver implementation details unnecessarily. Relax the capability check in dpll_pin_state_set() and dpll_pin_on_pin_state_set(): when a pin has an associated fwnode, bypass the capability gate and let the ops layer decide, returning -EOPNOTSUPP if .state_on_dpll_set is absent. Non-fwnode pins retain the original strict behavior. This is used later in the series by the SyncE_Ref output pin, which relies on the fwnode path for state control. Reviewed-by: Aleksandr Loktionov Reviewed-by: Jiri Pirko Signed-off-by: Grzegorz Nitka --- drivers/dpll/dpll_netlink.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index 8232d4543c7d..bf729cde796a 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -1325,8 +1325,11 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, unsigned long i; int ret; + /* fwnode pins may not set the capability bit upfront; let the ops + * layer return -EOPNOTSUPP if the operation is unsupported. + */ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop.capabilities)) { + pin->prop.capabilities) && !pin->fwnode) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } @@ -1361,8 +1364,11 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, struct dpll_pin_ref *ref; int ret; + /* fwnode pins may not set the capability bit upfront; let the ops + * layer return -EOPNOTSUPP if the operation is unsupported. + */ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop.capabilities)) { + pin->prop.capabilities) && !pin->fwnode) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } -- 2.39.3