From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-171.mta0.migadu.com (out-171.mta0.migadu.com [91.218.175.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC8363CF695 for ; Tue, 9 Jun 2026 06:02:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780984967; cv=none; b=QZL4dRm/mkYF+BBD1+DbCPS6XjE84nfejaAsjfTgGU1Ctj6SikmcZAB6WR/apKQFyxsG/2wKE9wQ+xQLeBFf3GQ9BkFZxgMVbvTotdvvuX0xCwKa0F4YxbKONWKiH+6YikyZBcLmgbNybvOO+axsioCbeRkHlDE3QVGG04nJNBU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780984967; c=relaxed/simple; bh=6eZbdU9r01O5U5cRm3lfBtUDAYJFjIGr572PLFh0R2o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LELbwO+1rG4dcFWdBq0spjVbhjEkXBt95gzMokyEyOs8rQUdXa5B8gVBFPCGuR77K2A50AIyHCvI385UvEEmymqPyishdjJvIlaNh9IVLN503WkugNB/sMqLdq6kkBFmXw0XVxoDj5WUkBO3pocXRxH03WqfiOh0cMoAumpTpP4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=jCjDz6SV; arc=none smtp.client-ip=91.218.175.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="jCjDz6SV" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1780984963; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O1z/SRTOq77wAaiCHEBuev51rOxTNht3QVh4Cw0HEOc=; b=jCjDz6SVbqt1iFak016WIHhEhWUYY1Ntq9uNSAFshLgBB1QMxE46zOIGO1IDOlzq4ljGSV RB6Zb8r9VIIei0ry7myIiFXQtsDMiiTihsUFcDaeDapkoaeH1xLKSXV2DfPl30CkKTw1q3 LWwjKbJhA1NqXMhcm8jentvBSk/tKXo= From: Atish Patra Date: Mon, 08 Jun 2026 23:01:28 -0700 Subject: [PATCH v6 14/21] RISC-V: perf: Skip PMU SBI extension when not implemented Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260608-counter_delegation-v6-14-285b72ed65a9@meta.com> References: <20260608-counter_delegation-v6-0-285b72ed65a9@meta.com> In-Reply-To: <20260608-counter_delegation-v6-0-285b72ed65a9@meta.com> To: James Clark , Rob Herring , Atish Patra , Arnaldo Carvalho de Melo , Jiri Olsa , Will Deacon , Mark Rutland , Anup Patel , Namhyung Kim , Paul Walmsley , Krzysztof Kozlowski , Ian Rogers Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Migadu-Flow: FLOW_OUT From: Charlie Jenkins When the PMU SBI extension is not implemented, sbi_v2_available should not be set to true. The SBI implementation for counter config matching and firmware counter read should also be skipped when the SBI extension is not implemented. Signed-off-by: Atish Patra Signed-off-by: Charlie Jenkins --- drivers/perf/riscv_pmu_sbi.c | 48 ++++++++++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 1f16df9d0dd0..5bfcd3821f57 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -479,27 +479,31 @@ static void rvpmu_sbi_check_event(struct sbi_pmu_event_data *edata) } } -static void rvpmu_sbi_check_std_events(struct work_struct *work) +static void rvpmu_check_std_events(struct work_struct *work) { int ret; - if (sbi_v3_available) { - ret = pmu_sbi_check_event_info(); - if (ret) - pr_err("pmu_sbi_check_event_info failed with error %d\n", ret); - return; - } + if (riscv_pmu_sbi_available()) { + if (sbi_v3_available) { + ret = pmu_sbi_check_event_info(); + if (ret) + pr_err("pmu_sbi_check_event_info failed with error %d\n", ret); + return; + } - for (int i = 0; i < ARRAY_SIZE(pmu_hw_event_sbi_map); i++) - rvpmu_sbi_check_event(&pmu_hw_event_sbi_map[i]); + for (int i = 0; i < ARRAY_SIZE(pmu_hw_event_sbi_map); i++) + rvpmu_sbi_check_event(&pmu_hw_event_sbi_map[i]); - for (int i = 0; i < ARRAY_SIZE(pmu_cache_event_sbi_map); i++) - for (int j = 0; j < ARRAY_SIZE(pmu_cache_event_sbi_map[i]); j++) - for (int k = 0; k < ARRAY_SIZE(pmu_cache_event_sbi_map[i][j]); k++) - rvpmu_sbi_check_event(&pmu_cache_event_sbi_map[i][j][k]); + for (int i = 0; i < ARRAY_SIZE(pmu_cache_event_sbi_map); i++) + for (int j = 0; j < ARRAY_SIZE(pmu_cache_event_sbi_map[i]); j++) + for (int k = 0; k < ARRAY_SIZE(pmu_cache_event_sbi_map[i][j]); k++) + rvpmu_sbi_check_event(&pmu_cache_event_sbi_map[i][j][k]); + } else { + DO_ONCE_LITE_IF(1, pr_info, "Boot time config matching not required for smcdeleg\n"); + } } -static DECLARE_WORK(check_std_events_work, rvpmu_sbi_check_std_events); +static DECLARE_WORK(check_std_events_work, rvpmu_check_std_events); static ssize_t rvpmu_format_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -692,6 +696,9 @@ static int rvpmu_sbi_ctr_get_idx(struct perf_event *event) cflags = rvpmu_sbi_get_filter_flags(event); + if (!riscv_pmu_sbi_available()) + return -ENOENT; + /* * In legacy mode, we have to force the fixed counters for those events * but not in the user access mode as we want to use the other counters @@ -967,7 +974,7 @@ static u64 rvpmu_ctr_read(struct perf_event *event) return val; } - if (pmu_sbi_is_fw_event(event)) { + if (pmu_sbi_is_fw_event(event) && riscv_pmu_sbi_available()) { ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_FW_READ, hwc->idx, 0, 0, 0, 0, 0); if (ret.error) @@ -2045,12 +2052,13 @@ static int __init rvpmu_devinit(void) int ret; struct platform_device *pdev; - if (sbi_spec_version >= sbi_mk_version(0, 3) && - sbi_probe_extension(SBI_EXT_PMU)) - static_branch_enable(&riscv_pmu_sbi_available); + if (sbi_probe_extension(SBI_EXT_PMU)) { + if (sbi_spec_version >= sbi_mk_version(0, 3)) + static_branch_enable(&riscv_pmu_sbi_available); + if (sbi_spec_version >= sbi_mk_version(2, 0)) + sbi_v2_available = true; + } - if (sbi_spec_version >= sbi_mk_version(2, 0)) - sbi_v2_available = true; /* * We need all three extensions to be present to access the counters * in S-mode via Supervisor Counter delegation. -- 2.53.0-Meta