From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-173.mta0.migadu.com (out-173.mta0.migadu.com [91.218.175.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 491F33D34A8 for ; Tue, 9 Jun 2026 06:03:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.173 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780984986; cv=none; b=S8U+GU08+yzw/fD83SFBCJIHON85yVpMBWTCnxO17mlS/DtriwOjpySAN9HDbYFqDJN6OWUSMFCXCuETVzU08l1pE3LpB3raogNrd7veX+BDP1pJx23qDg68RytK3vYGwLUegiaoV9buBizUefboO2Vy5LbAsUcm57qZ5XZFanc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780984986; c=relaxed/simple; bh=k+17zveiXsgYna87PZZulndW185hWQCYAep4cJQQgb0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gqRCwwU+kV81fP2G7Vv4DNqDcaSPSrhJAYdIEpCFlVnuDCoH1BnbFokfYK6hzE/skM643CGIfVQYPzbVvCSG5ZLa+80sh/4maWcA7/s4djOdDrjaxCg8nRrU9GHZ6N3vAOoCpmK8Ui8AR7dV4cAlyCqFSyGVbJTvmSvnZHfDSPU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=hP9Rm69m; arc=none smtp.client-ip=91.218.175.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="hP9Rm69m" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1780984983; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=D+RY5vs8Ycg6LE30rSiyWAmudN3MbQny6JzyIGr7w5M=; b=hP9Rm69mOpasNJw11/lRGlyztBd+hadPrkDV5aRjA3ORORrIZs+J6QDIwHl8yzt28C5xis IOKTkP8psc4VuO54NNW8FxTrKPJUkDumKoFTr6XdHjPB1aIRpcmV9Kp2DgwpOp6fKoqI8L sGTDNS1Ath5FnCtwfgNSX2lm9pIjYRY= From: Atish Patra Date: Mon, 08 Jun 2026 23:01:32 -0700 Subject: [PATCH v6 18/21] tools/perf: Support event code for arch standard events Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260608-counter_delegation-v6-18-285b72ed65a9@meta.com> References: <20260608-counter_delegation-v6-0-285b72ed65a9@meta.com> In-Reply-To: <20260608-counter_delegation-v6-0-285b72ed65a9@meta.com> To: James Clark , Rob Herring , Atish Patra , Arnaldo Carvalho de Melo , Jiri Olsa , Will Deacon , Mark Rutland , Anup Patel , Namhyung Kim , Paul Walmsley , Krzysztof Kozlowski , Ian Rogers Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Migadu-Flow: FLOW_OUT From: Atish Patra RISC-V relies on the event encoding from the json file. That includes arch standard events. If event code is present, event is already updated with correct encoding. No need to update it again which results in losing the event encoding. Signed-off-by: Atish Patra --- tools/perf/pmu-events/arch/riscv/arch-standard.json | 10 ++++++++++ tools/perf/pmu-events/jevents.py | 6 +++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/tools/perf/pmu-events/arch/riscv/arch-standard.json b/tools/perf/pmu-events/arch/riscv/arch-standard.json new file mode 100644 index 000000000000..96e21f088558 --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/arch-standard.json @@ -0,0 +1,10 @@ +[ + { + "EventName": "cycles", + "BriefDescription": "cycle executed" + }, + { + "EventName": "instructions", + "BriefDescription": "instruction retired" + } +] diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py index 3a1bcdcdc685..457fce7a5982 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -413,7 +413,11 @@ class JsonEvent: self.long_desc = None if arch_std: if arch_std.lower() in _arch_std_events: - event = _arch_std_events[arch_std.lower()].event + # If the JSON event already specified an event code, the encoding has + # been set above; don't overwrite it with the arch standard event or + # the event encoding would be lost. + if not eventcode: + event = _arch_std_events[arch_std.lower()].event # Copy from the architecture standard event to self for undefined fields. for attr, value in _arch_std_events[arch_std.lower()].__dict__.items(): if hasattr(self, attr) and not getattr(self, attr): -- 2.53.0-Meta