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Sun, 07 Jun 2026 21:17:04 -0700 (PDT) Received: from hu-neersoni-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c16649fcdfsm209392525ad.78.2026.06.07.21.17.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Jun 2026 21:17:04 -0700 (PDT) From: Neeraj Soni To: ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, neeraj.soni@oss.qualcomm.com, Kuldeep Singh Subject: [PATCH v7 2/3] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Date: Mon, 8 Jun 2026 09:46:49 +0530 Message-Id: <20260608041650.541502-3-neeraj.soni@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260608041650.541502-1-neeraj.soni@oss.qualcomm.com> References: <20260608041650.541502-1-neeraj.soni@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA4MDAzNCBTYWx0ZWRfXxcDVpFZQ14yZ xN6FhC/6qxfXOM/EWILftnw1SCGn9Q6ojJfwpS4+tvC1/ZqbfDExsKZUgvWybHy5TEpgFuA6r/C ZZQKgTzSSVeFm3xx5HIe9OhyzNJIQbb83qOq9DBo23DVLQ0U3FhY+lBe/NOVQjG7pcmfTveJrrO RIHlbiZVrCTzszYIl/EQbUlJNVL0lo2mGSy+KaOCxgnWb9zD9oYCkDMq0+mdBlbKXJtE8HgehdA zQxuHB5aK3TwcG69u5zWGnT5Ym4RQMCaqtcgH4gpLKcxurbPwEBuA90LRmaZQJBqOH1OJIurrKr NUIk6bKdTtR8cn1GOuOGGH3PXPx4/9AC8chknIvKy1vIBP9w025aSoaafdaitdTebU+1IZyv+OJ +QHOQFy46J0cCdsh8Niip9uQo6kJCOEnzQ5Y5SWmGFeo/FIRxJ6XC77d7nxV5fCVBi6mQEMaOhz 7CV1y/bPIt+IRNlbH3w== X-Authority-Analysis: v=2.4 cv=B5eJFutM c=1 sm=1 tr=0 ts=6a264242 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=CUYPcHLqniwTzHo6yF8A:9 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: mLo0t5ue1ylX1mM5CU7TyUxBPoHoPptT X-Proofpoint-ORIG-GUID: mLo0t5ue1ylX1mM5CU7TyUxBPoHoPptT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-08_01,2026-06-05_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 spamscore=0 malwarescore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606080034 Add an ICE node to kodiak SoC description and enable it by adding a phandle to the SDHC node. Reviewed-by: Kuldeep Singh Link: https://lore.kernel.org/r/20260310113557.348502-3-neeraj.soni@oss.qualcomm.com Signed-off-by: Neeraj Soni --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi index fa540d8c2615..caf4ec9cf9fc 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -1050,6 +1050,8 @@ sdhc_1: mmc@7c4000 { qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; + qcom,ice = <&sdhc_ice>; + mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; @@ -1076,6 +1078,13 @@ opp-384000000 { }; }; + sdhc_ice: crypto@7c8000 { + compatible = "qcom,sc7280-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg = <0x0 0x007c8000 0x0 0x18000>; + clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>; + }; + gpi_dma0: dma-controller@900000 { #dma-cells = <3>; compatible = "qcom,sc7280-gpi-dma", "qcom,sm6350-gpi-dma"; -- 2.34.1