From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57E1F1F2B8D for ; Mon, 8 Jun 2026 13:45:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780926334; cv=none; b=aOiRsTrZtegudF41HzmN6s0Rr7xmlvizA7qs3bLDhGg3dFnVvHCIXcILKvpFVMpZHwgQQpPbRg1K1u/OL+N2Qi1j9B2HWK7xwQ76kpZxzXDmnvs/05gRbMcnXLtKuf9uifPJOkqICWHILlK8BsfHc3o0iOhAudU2Vhsjaks6Z8U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780926334; c=relaxed/simple; bh=brvNZ3N1a0wz6pV7iprlWHZAsadEk5qYF40ZXnPqob4=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OI8eyHT6/OrPIV+8EC7srlY2zdHZ/sK0CHxUGpZMSFh43KsGQUTEHOKMNI7tRsj1OSV4tgicRQcjzhFj5MEVazv5BQ2eSNRAfaq/vuYH6oW8jLlpBv2ETUNHeahF1rgZIW88xnWP3ggd9Dc5+pQxxZRv6mgI2R+UAN+5ldl6LVg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=MHTfEQ6f; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="MHTfEQ6f" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1780926331; bh=brvNZ3N1a0wz6pV7iprlWHZAsadEk5qYF40ZXnPqob4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=MHTfEQ6fyjTAM5NwRStV79DWhT5X68KQMMgAFnW5l7+BQ2qRpch4inYhMsTFfoEGE R8iyLwx+H7Rv30LJrfA0VYns2zYHe97MoX6wgUX4CE5WIs6POyB0nchNXlA4pGz7wO tjDfCGQ3gxVGt76rawwyFCxjMcZdnAx+exi6kvoS8SoUd/GjLGwlRThSsxQhoYb7Zk LjoBqQBmX5OXBU6z/vshJkNkBWbNYVvCqg99uvcYAHdFYGybCPD5BN74AE2SzIzPPH 7AfcVRLkLnZzVfQHg8TDmPxqCYeRVsEpON+5wgbOCOgc66D+kc5FWtwjrBD34WiFgb QP9vKjOrOU9nA== Received: from fedora-2.home (unknown [100.64.0.11]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bbrezillon) by bali.collaboradmins.com (Postfix) with ESMTPSA id 3D36D17E0191; Mon, 8 Jun 2026 15:45:31 +0200 (CEST) Date: Mon, 8 Jun 2026 15:45:26 +0200 From: Boris Brezillon To: Karunika Choo Cc: dri-devel@lists.freedesktop.org, nd@arm.com, Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 06/18] drm/panthor: Derive MMU AS register addresses from base and stride Message-ID: <20260608154526.750c1a42@fedora-2.home> In-Reply-To: <20260528150546.3168527-7-karunika.choo@arm.com> References: <20260528150546.3168527-1-karunika.choo@arm.com> <20260528150546.3168527-7-karunika.choo@arm.com> Organization: Collabora X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 28 May 2026 16:05:34 +0100 Karunika Choo wrote: > diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c > index 48127313332f..9a64f977d28c 100644 > --- a/drivers/gpu/drm/panthor/panthor_mmu.c > +++ b/drivers/gpu/drm/panthor/panthor_mmu.c > @@ -36,6 +36,7 @@ > #include "panthor_gpu.h" > #include "panthor_gpu_regs.h" > #include "panthor_heap.h" > +#include "panthor_hw.h" > #include "panthor_mmu.h" > #include "panthor_mmu_regs.h" > #include "panthor_sched.h" > @@ -57,7 +58,7 @@ struct panthor_as_slot { > */ > struct panthor_mmu { > /** @iomem: CPU mapping of MMU_AS_CONTROL iomem region */ > - void __iomem *iomem; > + void __iomem *iomem[MAX_AS_SLOTS]; Can we move the iomem field to panthor_as_slot? > > /** @irq: The MMU irq. */ > struct panthor_irq irq;