From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3115E3CC7F3 for ; Mon, 8 Jun 2026 14:51:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780930298; cv=none; b=m75HQ8HtjDm+UfWC/93WYndNLUSupNHSI/z34e6wd/28dV8aibpd+6fsySY1bKw+hO69RbUpC+AwwoJ9UtZZ6sIiMmiauc3CNEvyoiMLIcUDqdduv2Z0dwKmQv1rWNvuNtoHuaKnn45sKOhlYUUM38dH0UuqxJFggKRYFa59M/U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780930298; c=relaxed/simple; bh=yB6hEdYsDoy24TOUYX7Qc/L4+I+uRH9c2rL6OnPqQug=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WV7COVKAoxHlCTQ2IRlgRHAXDmIx716oDRYfKYAbtzJ0QIoKvtEnhKnhGyIMh+PaZugiemj8N1gZqMzC98Sikh2qZEa5wxs4XL9mQrOK2q5q/vDnhYRvgmy7WmBC5OTf67xxeYpb6KKozO5Tu2ZFLV+ysq7iaMpE2vmb733/vn4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=hGJeD3xj; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hGJeD3xj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1780930295; bh=yB6hEdYsDoy24TOUYX7Qc/L4+I+uRH9c2rL6OnPqQug=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=hGJeD3xjeBU2Db1cL3n/VH0zrP5ELV+GPTbkiCgVq4uOC8TYiN3GIFMuK6nqYY0Yc 1A/7Cw3d4sc8JFwmVPMoAdY7VI5bSCrv8iF18+8hFAKbsIgvmAyVXKzgwXMb1x0/UJ IEKGNw6gxkD7xj9x051Xy9DAr4aiXHDGeeEoHApPdebPVQPbtOwftKQ/obY+octNPQ 4v4OQ+vC3HhlMWxJ3pBz8BjRJpK2cWWlDF2DP4101N5ROR2rxTotnh/O7L4aT6lgK0 4C/wmqYTBg/e7IVRK7fWbtiQX6jeMdoaJsJYRln7tQVPgfeAYjUoFUR0Jxh2mQxuJd 7zijarkNERguQ== Received: from fedora-2.home (unknown [100.64.0.11]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bbrezillon) by bali.collaboradmins.com (Postfix) with ESMTPSA id 1704217E04CA; Mon, 8 Jun 2026 16:51:35 +0200 (CEST) Date: Mon, 8 Jun 2026 16:51:28 +0200 From: Boris Brezillon To: Karunika Choo Cc: dri-devel@lists.freedesktop.org, nd@arm.com, Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 08/18] drm/panthor: Skip devfreq when no OPP table is present Message-ID: <20260608165128.33732c17@fedora-2.home> In-Reply-To: References: <20260528150546.3168527-1-karunika.choo@arm.com> <20260528150546.3168527-9-karunika.choo@arm.com> <20260608160822.1038d08e@fedora-2.home> Organization: Collabora X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Mon, 8 Jun 2026 15:39:56 +0100 Karunika Choo wrote: > On 08/06/2026 15:08, Boris Brezillon wrote: > > On Thu, 28 May 2026 16:05:36 +0100 > > Karunika Choo wrote: > > > >> On Mali v15 AM systems, frequency scaling is handled outside panthor by > >> the AM_GOVERNOR block, so the GPU DT node may not provide an OPP table. > > > > OOC, is this still handled as clock frequency changes? I'm asking > > because the recent perfcnt work requires registering clk notifiers to > > get an approximation of the number of shader/top-level/coregroup clock > > cycles on a given period of time so we an calculate relative GPU > > utilization, and so far we've only considered clk notifiers as a way to > > get informed of these frequency changes. > > > > BTW, this is already problematic for the mediatek GPUEB design, where > > devfreq stuff is delegated to an MCU, and we don't currently have a way > > to get notified when this MCU changes the frequencies. > > > > I believe we should still support initializing clocks and registering > notifiers for them. We are just disabling the devfreq subsystem in > this patch. > > Would mediatek be able to expose a child clock or logical clock from > ther GPUEB driver to Panthor so that we can get these notifications? Yep, the clk is exposed and I believe the current clk rate is properly reflected when clk_get_rate() is called, but the clk framework only issues notification for rate change requests going through clk_set_rate(), there's no way for a clk provider to report a rate change AFAIK.