From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F0BE3E7BC7 for ; Tue, 9 Jun 2026 09:46:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780998416; cv=none; b=n9eyq7Pg0WcYrHNvUHOALc9RzgPZ6MNEwTc68sOVb5z3KBa8KRnfjXswWlsVFeZ7uDZHCuPNeQKkeKTRsKx28hPrCaW62Zo184wY5t2wcdSZfT3bd6fpN6w5Mp51hoN1LbaN5zxk39lMEB9pti5qHNuEAQfkFVZypAdR25+QuBw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780998416; c=relaxed/simple; bh=utX2rWcnEK7sp26OqAqarcDBJ0uE50FzNeV/RPRB27I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fsUWe8J72QXxV79CygOMcBlDyWI0RTmWPqvSwDY5O1YIHahHgXrX0MQPASL4mQUKUFvr3JI82c7vMY7yrEiSPARgmsmVnnoJlTY3s02UeUJJ4Z/MhEVql2NtjIJh/51ASdPtwrSvKQrtk7eJq3x9b/JcvGqXv9tPIE4QU9LENG0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=HdKfR2oi; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=hNAcd8VZ; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="HdKfR2oi"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="hNAcd8VZ" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6597rbfk2034652 for ; Tue, 9 Jun 2026 09:46:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= gsb2m0YYMxi0oazQhslfYqgxjuHbp4QxtyHnC/SdYhY=; b=HdKfR2oiPO5h+fm+ TMqC4xzUt1k//m4c2C3bv6HWlZ90p8eca7S8umejkhW6BvMXuvAAnwTIztvMop7P ykiyBaiTEHbBKBsJ2baKbTAYdNgYvorIc0zQoqyKdSFIN5QKwBxTD+PEB5IiAOZF syJ4vzrdGpjaVoQ5rgnEjZcTMZ0Z/CtoeyPdOHOqhZ4fIP119R9+6ZR3acQ/mLKr WTA5lR3+x/4X66d01ariOMq/5hlLwD5QppiF2Bh3HsElLNkmnaKKIZDGRRZ5zDb/ SZQkt7xuEXrDki/bd/9iPT1Egly+ClSSgVUwU2lS64Urp8BhIzavOt9LUyZ8JJ+C K7CPbw== Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4epeearjjp-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 09 Jun 2026 09:46:54 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-91578c374easo1125827285a.1 for ; Tue, 09 Jun 2026 02:46:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780998414; x=1781603214; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=gsb2m0YYMxi0oazQhslfYqgxjuHbp4QxtyHnC/SdYhY=; b=hNAcd8VZReficCSW1tdEj65uXtB67LLFMRunm1QlU2OEv/BBABzzzqaZPSZiguPGco eUPHaHrZlsZvd8RaCJsBtuPKNGIBtf/h2JhgscYn+TmR1pmVxC9RIQE8EKfSIbfJYWIO 8lXMHJexa5fCXNkVFF2vCxLgrayjHoHv++gECmeV3MNbsORwuM7duwFNs1cimoQDnRpx bpsDq0MLUoncS9Hh4vTaBM6sBhlJaJqzI3BtSYhRAbAdt1SnGpMmZwaRUX9U9IqWKxnG o5o9svgELbo+BWd1aKAwuonlzSTS2jBDdbuKVh6amanBLm4R1Vs6ryicC37ppNRCkgcK viAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780998414; x=1781603214; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=gsb2m0YYMxi0oazQhslfYqgxjuHbp4QxtyHnC/SdYhY=; b=p5r5Tky5hQJbkgOL7O65iQw1vnAjmn4XEL2D2mlS5gMaee/KLi+fFBwoJm20jDLXso CHWn8BOPm0k7YAY8fIe2BTQOId9GlzI8UjforkRhdGDOM4I0QwTadAZWNVnQRzZm/zi4 jzSK1v5xNEfWQ56HS7x5rjP7kYTNqbQyIC+vR70JG3bSNjK6gXoi7+OSFK/wpyz3TIAc CJEQ6MG77e1drbQ1uPVqbK/S4Ct20Sb5je4Ab1EwdhhdeDLUk4EdKZ8OUTMTXVRN9O0V YtaG8mlpT0VzUaEWLrG1qwNI35lXmsq6CY1CbG7ImFh5PkZrpK+z9w3gyJxqqOehX4pf hl1w== X-Forwarded-Encrypted: i=1; AFNElJ9pD6lOrREcqVpwux7CztCLs/QrdTAda96h7yiFQ8OeYl5cNUnIEKOVRnqnpEQLl8Iehwighe/9EMHDJnU=@vger.kernel.org X-Gm-Message-State: AOJu0Yydhl9KZWv8XcHh/De/xyKXDsXWJoCRAtfkBP+jsOWOhqkvHflv gJ9H6XabzN91OJui/9mR4m14jPaCkGlRNwEk9fcXuVNx9Hz+2mZ/tySwZcJzVxY9SzMxBWqMgw5 iZ1YJKWl/MhDwWAz6mdqlyAGgklnnSBqtXmzkqB85UDRz+FnWG6Ir46C13q7S5XShtzQ= X-Gm-Gg: Acq92OHvJ/41xDNqegOkZVraTGnTeqgqy6rlznJ3BOFX69b9HKXFB74j+ll8FafCIEX 8f8eL/rmXe4rDSSG5Vbl/MuYuxkT4Ask7+EqEWXSggg28mposlihKee/Hv0HtcZSHbUZ5ptnOY0 LwzJeK+hAbIbNe6x91Mf935cUEqhCV5QCifpWz03+ywG0Cj4SAnoNPrDGNII++SJ1zABrLAGAmw 2HnLAGlhTl/GuXIDwjLaD7sFeVtOxJZZ/ZB9ZJIsVPvK0qd2SE78QfM43oMNT8hvaxfkguEDw4J 5jdyuvkq9tkWxWnS2SbRGKstC63k66d8t1X0UY2DEYwXRA5u5hd9KvGqcWKqGrDFvzlOc1tBwal qV2Q6ijaPm31bGCACB5MZ81yUrqDFFtV66R6hDGbQjBONW8xSIYlDrDvFHUjzwPP1IXGO4HSLVo 5bcyz56RcKvcJytBKQTw== X-Received: by 2002:a05:620a:1988:b0:915:7f6f:c8c0 with SMTP id af79cd13be357-915a9cadf7cmr3172256085a.15.1780998413777; Tue, 09 Jun 2026 02:46:53 -0700 (PDT) X-Received: by 2002:a05:620a:1988:b0:915:7f6f:c8c0 with SMTP id af79cd13be357-915a9cadf7cmr3172251785a.15.1780998413402; Tue, 09 Jun 2026 02:46:53 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id af79cd13be357-9158a00afafsm2047489485a.2.2026.06.09.02.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jun 2026 02:46:53 -0700 (PDT) From: Yongxing Mou Date: Tue, 09 Jun 2026 17:46:25 +0800 Subject: [PATCH v7 03/15] drm/msm/dp: move mode setup into msm_dp_panel_init_panel_info() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260609-dp_mstclean-v7-3-ea04113e8233@oss.qualcomm.com> References: <20260609-dp_mstclean-v7-0-ea04113e8233@oss.qualcomm.com> In-Reply-To: <20260609-dp_mstclean-v7-0-ea04113e8233@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yongxing Mou , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780998392; l=4086; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=utX2rWcnEK7sp26OqAqarcDBJ0uE50FzNeV/RPRB27I=; b=A2HR27xzrxB/wtBy9J4YOlebtXmWevEbShlDriMz70kcp3Sdwz1vvlnqBVe4axQgYqNt3cYm5 YkDp/8ZE8ASC74VUieDHxuPw3McqqpcuhhX8FM0bcqRR7QD40GtxQAD X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-ORIG-GUID: ZwXHd4k1I8tvMLad7tX2V78wMLaDMOSs X-Authority-Analysis: v=2.4 cv=Iey3n2qa c=1 sm=1 tr=0 ts=6a27e10e cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=RRF978PcF5p4qF5CYGQA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA5MDA5MCBTYWx0ZWRfXyc4v7JXMwCYa Q7QtlLXR1Itrtqp3N1CoAHa7iHuZ6km//DDgioIfuz19N6ws6xx6iSb/gWvs36IaDH4JRNoeTZ+ rVbOs3y7jbPXCX69krp4ltVK+iY/71i1Br39h3LTRpuSY+JHLPgeJ8osEpE4vHEbjfTLVd5tM2f bZxHzT8QivJ+uHcJTwWQNJVfANmbuZvwZoVzKCubFNxzhr/JICdoYmclh//iNwKeD/vmJ8qlTqq Zgf2g59TJL4jKL1sN/8HKHdyeZnl43vLDcgm3PLoeD8vJbDXfZFt9PUikq4zozom14fvqLyj2oB N+HU+AmDevSL6HFxzmAFAIfu5t+qC6nVlMa1ddIRIo5oc97Qtc+MmNLfYn54g0wEPa1L9PqKv2i iRYWbmv5kJr8DNdFBGSyXp+lmo04cD6s2qTItMA1PC7JwHswZEbKn5LvQ9voNOOE1C1Fcxyw6RA vUp2rGoFE4fY+t9H4sQ== X-Proofpoint-GUID: ZwXHd4k1I8tvMLad7tX2V78wMLaDMOSs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-09_02,2026-06-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 bulkscore=0 phishscore=0 clxscore=1015 priorityscore=1501 adultscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606090090 The display layer directly assigns msm_dp_panel mode fields (bpp, sync polarity, yuv420 flag) instead of letting the panel manage its own state. Pass adjusted_mode and bpp as parameters to msm_dp_panel_init_panel_info() and move the assignments inside it. Suggested-by: Dmitry Baryshkov Signed-off-by: Yongxing Mou Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 11 +---------- drivers/gpu/drm/msm/dp/dp_panel.c | 18 +++++++++++++++--- drivers/gpu/drm/msm/dp/dp_panel.h | 4 +++- 3 files changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 181d238addfc..f33c754b83c3 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -604,21 +604,12 @@ static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display); - drm_mode_copy(&msm_dp_panel->msm_dp_mode.drm_mode, adjusted_mode); if (msm_dp_display_check_video_test(msm_dp_display)) bpp = msm_dp_display_get_test_bpp(msm_dp_display); else bpp = msm_dp_panel->connector->display_info.bpc * 3; - msm_dp_panel->msm_dp_mode.bpp = bpp ? bpp : 24; /* Default bpp */ - msm_dp_panel->msm_dp_mode.v_active_low = - !!(adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC); - msm_dp_panel->msm_dp_mode.h_active_low = - !!(adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC); - msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 = - drm_mode_is_420_only(&msm_dp_panel->connector->display_info, adjusted_mode) && - msm_dp_panel->vsc_sdp_supported; - msm_dp_panel_init_panel_info(msm_dp_panel); + msm_dp_panel_init_panel_info(msm_dp_panel, adjusted_mode, bpp ? bpp : 24); /* populate wide_bus_support to different layers */ dp->ctrl->wide_bus_en = diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c index bde4a772d22c..e76dad0f6663 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -647,15 +647,27 @@ int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel, bool wide_bus_en) return 0; } -int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel) +int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel, + const struct drm_display_mode *adjusted_mode, + u32 bpp) { struct drm_display_mode *drm_mode; struct msm_dp_panel_private *panel; - drm_mode = &msm_dp_panel->msm_dp_mode.drm_mode; - panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); + drm_mode_copy(&msm_dp_panel->msm_dp_mode.drm_mode, adjusted_mode); + msm_dp_panel->msm_dp_mode.bpp = bpp; + msm_dp_panel->msm_dp_mode.v_active_low = + !!(adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC); + msm_dp_panel->msm_dp_mode.h_active_low = + !!(adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC); + msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420 = + drm_mode_is_420_only(&msm_dp_panel->connector->display_info, adjusted_mode) && + msm_dp_panel->vsc_sdp_supported; + + drm_mode = &msm_dp_panel->msm_dp_mode.drm_mode; + /* * print resolution info as this is a result * of user initiated action of cable connection diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_panel.h index 53b7b4463551..4519ac374220 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.h +++ b/drivers/gpu/drm/msm/dp/dp_panel.h @@ -43,7 +43,9 @@ struct msm_dp_panel { u32 max_bw_code; }; -int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel); +int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel, + const struct drm_display_mode *adjusted_mode, + u32 bpp); int msm_dp_panel_deinit(struct msm_dp_panel *msm_dp_panel); int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel, bool wide_bus_en); int msm_dp_panel_read_link_caps(struct msm_dp_panel *msm_dp_panel, -- 2.43.0