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Miller" , Bartosz Golaszewski , Eric Biggers Cc: Thara Gopinath , linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Kuldeep Singh X-Mailer: b4 0.15.1 X-Authority-Analysis: v=2.4 cv=Gu1yPE1C c=1 sm=1 tr=0 ts=6a28fc0a cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=J69qjfz861JwZTRCukIA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjEwMDA1MiBTYWx0ZWRfX9KEqGBp9rAzG OLDOm4qAgpPDUctb0BjS52suGlmvl8M5lZKWE+WEv4wVSExGG9+ATxREhEZHicd/cEfGoAXfZvF 8BUwC62De84xvdiGhMEKDPDYNczymESscAu0ZaaRs7qQ6pswYB0plpDaRg/6Soux6RgeAAFzxk8 U6HR3qnXzg7gGvwrLAnfa0aBQ4Nw0nuYn1ZKeULYJoONXvYv7FA7if6AbOsuXhLYCPh22g47XDU v6AMddRA3YwFMoCVFFFTdvvq5Ad6awDiomEHXIndNFabAItdLHSY731WMguSoFy+WAR76qCepZ6 2fhn978DuAJC7MA0s+op8LNAYqbRvcuctHhSErLNvRnE0wvdgWkXKABsu3AesQwMSYaz92NjQtP K4sIlQqNRoDMY2yl8y5a4RF12Y1o9sADXbsK1C+pRz5WTa9CBx8ylAVDOi3KaWBZpaueUcxLeoK 1uZJgDcfnJCH2kMHKBA== X-Proofpoint-ORIG-GUID: 0YWFxn-PADHMJ6Y46wyZIyPPeB_e5pBt X-Proofpoint-GUID: 0YWFxn-PADHMJ6Y46wyZIyPPeB_e5pBt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-10_01,2026-06-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 adultscore=0 clxscore=1015 spamscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606100052 In CTR mode, the IV acts as the initial counter block. APer NIST SP 800-38A, after a CTR mode operation the next unused counter value is: IV_next = IV_in + ceil(cryptlen / AES_BLOCK_SIZE) The skcipher requires req->iv to hold this updated counter on completion, ensuring chained requests produce correct results. Referring to Crypto6.0 documentation, Section 2.2.5 says: "The count value increments automatically once per block of data (in AES, a block is 16 bytes) based on the value in the CRYPTO_ENCR_CNTR_MASK registers." QCE increments internal counter register once per full 16-byte block(for ctr-aes) is processed. In case of partial request length, the hardware uses the current counter to generate keystreams but does not increment the counter register afterwards. So the counter value written in CRYPTO_ENCR_CNTRn_IVn later once read by software is one less than the expected value. Crypto selftest framework capture this scenario with test vector 4 comprising of a 499-byte payload (31 full blocks + 3 partial bytes). Error: [ 5.606169] alg: skcipher: ctr-aes-qce encryption test failed (wrong output IV) on test vector 4, cfg="in-place (one sglist)" [ 5.606176] 00000000: e7 82 1d b8 53 11 ac 47 e2 7d 18 d6 71 0c a7 61 [ 5.606192] alg: self-tests for ctr(aes) using ctr-aes-qce failed (rc=-22) Expected iv_out: 0x62 (iv_in + 32) Obtained iv_out: 0x61 (iv_in + 31, partial block not counted) To fix this, just increase the counter value for partial block requests by 1 and for the full block size requests, don't take any action as expected value is already returned by the hardware. Signed-off-by: Kuldeep Singh --- drivers/crypto/qce/skcipher.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index 224693a831f5..b25e3b76b6c8 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -59,6 +60,14 @@ static void qce_skcipher_done(void *data) dev_dbg(qce->dev, "skcipher operation error (%x)\n", status); memcpy(rctx->iv, result_buf->encr_cntr_iv, rctx->ivsize); + /* + * QCE hardware does not increment the counter for a partial final + * block. Increment it in software so that iv_out reflects the correct + * next counter value expected by the CTR mode. + */ + if (IS_CTR(rctx->flags) && + (rctx->cryptlen % crypto_skcipher_chunksize(crypto_skcipher_reqtfm(req)))) + crypto_inc(rctx->iv, rctx->ivsize); qce->async_req_done(tmpl->qce, error); } -- 2.34.1