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Wed, 10 Jun 2026 21:59:58 -0700 (PDT) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c164f8bc5asm276188335ad.27.2026.06.10.21.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jun 2026 21:59:58 -0700 (PDT) From: Krishna Chaitanya Chundru Date: Thu, 11 Jun 2026 10:28:52 +0530 Subject: [PATCH v2 16/37] arm64: dts: qcom: sa8540p-ride: Fix PCIe wake GPIO polarity Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260611-wake-v2-16-2744251b1181@oss.qualcomm.com> References: <20260611-wake-v2-0-2744251b1181@oss.qualcomm.com> In-Reply-To: <20260611-wake-v2-0-2744251b1181@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , cros-qcom-dts-watchers@chromium.org, Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krishna Chaitanya Chundru , Konrad Dybcio , Manivannan Sadhasivam X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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Fix the wake-gpios polarity by using GPIO_ACTIVE_LOW instead of GPIO_ACTIVE_HIGH. Signed-off-by: Krishna Chaitanya Chundru Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 44177e9b64b5..702ae4cd3d0c 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -367,7 +367,7 @@ &pcie2a { <0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>; perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pcie2a_default>; @@ -388,7 +388,7 @@ &pcie3a { <0x03000000 0x6 0x00000000 0x6 0x00000000 0x2 0x00000000>; perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; - wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pcie3a_default>; -- 2.34.1