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Thu, 11 Jun 2026 07:40:53 -0700 (PDT) From: fuqiang wang To: Marc Zyngier , Oliver Upton , Zenghui Yu , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev Cc: dongxu zhang , wangfuqiang49 , fuqiang wang Subject: [PATCH v2 1/2] arm64: Add MPIDR_EL1 RES1 definitions Date: Thu, 11 Jun 2026 22:40:41 +0800 Message-ID: <20260611144042.97981-2-fuqiang.wng@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20260611144042.97981-1-fuqiang.wng@gmail.com> References: <20260611144042.97981-1-fuqiang.wng@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit MPIDR_EL1 bit 31 is RES1. Add named definitions for the bit. Signed-off-by: fuqiang wang --- arch/arm64/include/asm/cputype.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 7b518e81dd15..22dc44d2de03 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -9,6 +9,7 @@ #define MPIDR_UP_BITMASK (0x1 << 30) #define MPIDR_MT_BITMASK (0x1 << 24) +#define MPIDR_RES1_BITMASK (UL(1) << 31) #define MPIDR_HWID_BITMASK UL(0xff00ffffff) #define MPIDR_LEVEL_BITS_SHIFT 3 -- 2.47.0