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[177.4.161.23]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3081e48bfa7sm1626248eec.5.2026.06.11.20.44.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jun 2026 20:44:03 -0700 (PDT) From: =?utf-8?q?C=C3=A1ssio_Gabriel?= Date: Fri, 12 Jun 2026 00:43:55 -0300 Subject: [PATCH] ALSA: pcxhr: Share PLL frequency register calculation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260612-alsa-pcxhr-pll-helper-v1-1-c84ae2bd2e9b@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXMQQrCMBBG4auUWTsQg6nFq4iLmP6akVDDTJVC6 d2NuvwW761kUIHRqVtJ8RaT59Sw33WUcpzuYBmbyTvfu94FjsUi17Rk5VoKZ5QK5aM/pDEMIfg B1NqquMny+54vf9vr+kCavzPatg+VI7cOeQAAAA== X-Change-ID: 20260605-alsa-pcxhr-pll-helper-724cd585528e To: Takashi Iwai , Jaroslav Kysela Cc: linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, notify@kernel.org, =?utf-8?q?C=C3=A1ssio_Gabriel?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4174; i=cassiogabrielcontato@gmail.com; h=from:subject:message-id; bh=19YJZHEKgec4AeWlnKI0fOltwLaU/HdtOwyb93tjdA4=; b=owGbwMvMwCV2IdZeKur/u2bG02pJDFnaDQ3v5xafWPBbZrvxPO2HXZ9fRKct+mrbveSqV/4U9 ZsNiYslOkpZGMS4GGTFFFlWJy2y3NP14Gp93AoPmDmsTCBDGLg4BWAiP4sYGW605Nitu3hZ8e3V 7Lijc83F4ouZT25wMuYVZ39f3LAnOZ+RYcenGRuXPNBQ4edfKr5nxZ314e81FO0OXVy/xWW18uH /6UwA X-Developer-Key: i=cassiogabrielcontato@gmail.com; a=openpgp; fpr=AB62A239BC8AE0D57F5EA848D05D3F1A5AFFEE83 The PCXHR and HR222 clock paths duplicate the PLL divider calculation and register encoding. The HR222 variant extends the same format with an additional range for rates above those supported by the older boards. Move the complete encoding into pcxhr_pll_freq_register() and pass each hardware path its existing maximum frequency. The additional encoding branch is unreachable with the older 110 kHz limit, so this preserves both paths' accepted ranges and generated register values while removing the duplicate implementation and its long-standing TODO. Signed-off-by: Cássio Gabriel --- base-commit: 0f6f60115bfc536c1935d3d0da66cf1d5c7d6055 --- sound/pci/pcxhr/pcxhr.c | 13 ++++++++----- sound/pci/pcxhr/pcxhr.h | 2 ++ sound/pci/pcxhr/pcxhr_mix22.c | 33 ++------------------------------- 3 files changed, 12 insertions(+), 36 deletions(-) diff --git a/sound/pci/pcxhr/pcxhr.c b/sound/pci/pcxhr/pcxhr.c index 1eea40e94c43..25a640304430 100644 --- a/sound/pci/pcxhr/pcxhr.c +++ b/sound/pci/pcxhr/pcxhr.c @@ -180,16 +180,18 @@ static const struct board_parameters pcxhr_board_params[] = { (x->fw_file_set == 0) || \ (x->fw_file_set == 2)) -static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, - unsigned int* realfreq) +int pcxhr_pll_freq_register(unsigned int freq, unsigned int max_freq, + unsigned int *pllreg, unsigned int *realfreq) { unsigned int reg; - if (freq < 6900 || freq > 110000) + if (freq < 6900 || freq > max_freq) return -EINVAL; reg = (28224000 * 2) / freq; reg = (reg - 1) / 2; - if (reg < 0x200) + if (reg < 0x100) + *pllreg = reg + 0xc00; + else if (reg < 0x200) *pllreg = reg + 0x800; else if (reg < 0x400) *pllreg = reg & 0x1ff; @@ -260,7 +262,8 @@ static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate, default : val = PCXHR_FREQ_PLL; /* get the value for the pll register */ - err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq); + err = pcxhr_pll_freq_register(rate, 110000, &pllreg, + &realfreq); if (err) return err; pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); diff --git a/sound/pci/pcxhr/pcxhr.h b/sound/pci/pcxhr/pcxhr.h index 1b85200d00dd..011227b1fe79 100644 --- a/sound/pci/pcxhr/pcxhr.h +++ b/sound/pci/pcxhr/pcxhr.h @@ -190,6 +190,8 @@ struct pcxhr_hostport }; /* exported */ +int pcxhr_pll_freq_register(unsigned int freq, unsigned int max_freq, + unsigned int *pllreg, unsigned int *realfreq); int pcxhr_create_pcm(struct snd_pcxhr *chip); int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate); int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, diff --git a/sound/pci/pcxhr/pcxhr_mix22.c b/sound/pci/pcxhr/pcxhr_mix22.c index 80d22e22ea30..76beb443d983 100644 --- a/sound/pci/pcxhr/pcxhr_mix22.c +++ b/sound/pci/pcxhr/pcxhr_mix22.c @@ -305,36 +305,6 @@ int hr222_sub_init(struct pcxhr_mgr *mgr) } -/* calc PLL register */ -/* TODO : there is a very similar fct in pcxhr.c */ -static int hr222_pll_freq_register(unsigned int freq, - unsigned int *pllreg, - unsigned int *realfreq) -{ - unsigned int reg; - - if (freq < 6900 || freq > 219000) - return -EINVAL; - reg = (28224000 * 2) / freq; - reg = (reg - 1) / 2; - if (reg < 0x100) - *pllreg = reg + 0xC00; - else if (reg < 0x200) - *pllreg = reg + 0x800; - else if (reg < 0x400) - *pllreg = reg & 0x1ff; - else if (reg < 0x800) { - *pllreg = ((reg >> 1) & 0x1ff) + 0x200; - reg &= ~1; - } else { - *pllreg = ((reg >> 2) & 0x1ff) + 0x400; - reg &= ~3; - } - if (realfreq) - *realfreq = (28224000 / (reg + 1)); - return 0; -} - int hr222_sub_set_clock(struct pcxhr_mgr *mgr, unsigned int rate, int *changed) @@ -345,7 +315,8 @@ int hr222_sub_set_clock(struct pcxhr_mgr *mgr, switch (mgr->use_clock_type) { case HR22_CLOCK_TYPE_INTERNAL: - err = hr222_pll_freq_register(rate, &pllreg, &realfreq); + err = pcxhr_pll_freq_register(rate, 219000, + &pllreg, &realfreq); if (err) return err;