From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0AAB381AF1 for ; Thu, 11 Jun 2026 23:45:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781221551; cv=none; b=cfGsJrGPw9I/tFICL/8uX2eZqU5RLlbZBQVdAtmUlInxRYKVaajcvgvKTKBue73qqEY8nXb9lmHQJwH5S6OVp2DPMX952QCKUowevPM2ID+2qnrDsoF1MHyH/ikZMi/BhUSMbIM01grU3PgZiOty3e3r0oJaUJ3Z5MuXY7QFT6g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781221551; c=relaxed/simple; bh=O76zc6hZ3sZD7icHCi6nwGcYj5BUYZJBnFM55uK6B8A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kQD2Aa84T8HA5qWGmxcJKvEIdAxmHjiCmeiPt7hAA0GkYE7lAnsNi3hChChUptpnIgVKeN8QTpGcd2klcMZ+cVyeSwiTmzAKLYef/b9y+qvYDrDHCnkEIaNPOb5YjMZ7ha1IHu2wqUXHmIRfJGIvwGQ19U6Reu7/J7Kd7yZJePI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=F4Zsa8B6; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="F4Zsa8B6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1781221544; bh=O76zc6hZ3sZD7icHCi6nwGcYj5BUYZJBnFM55uK6B8A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=F4Zsa8B6gj4fnEh0XECOhKkm0iTLDAxD3EQpdKNiv1XWA41CoUsLUYjHh2f9Z4ULb j+ys3NQ07mYjPPOfI/+mI6U3mCx1gEytulHEMkzpyN4oFzibwUbbnugHqnFcY7IOlA UGbcxMZLDYGSfyYK/1nm9gbo+XHTduFyXnpTJ2+B7WTV41l5IbVwr5N0i8wSbEqDd1 RbHnazrKKELsdkiEtRJ3Ch6j3IXANAuCy/kP4LuVGHHLDrPSOaD+MNttyMV5QNJn74 gdM0rMg+P59IsFnn3Jv9HR5mhIMbIZaoOayHFHVaDHE0c7Dyuc3nZxAVGUPYykwtpL a76ku9WT1+hiA== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id C20EA17E09A3; Fri, 12 Jun 2026 01:45:44 +0200 (CEST) From: Cristian Ciocaltea Date: Fri, 12 Jun 2026 02:45:21 +0300 Subject: [PATCH v4 2/8] phy: rockchip: samsung-hdptx: Prevent divide-by-zero when computing clk rate Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260612-hdptx-clk-fixes-v4-2-ce5e1d456cda@collabora.com> References: <20260612-hdptx-clk-fixes-v4-0-ce5e1d456cda@collabora.com> In-Reply-To: <20260612-hdptx-clk-fixes-v4-0-ce5e1d456cda@collabora.com> To: Vinod Koul , Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Sashiko X-Mailer: b4 0.15.2 Calculating 'sdm' fraction in rk_hdptx_phy_clk_calc_rate_from_pll_cfg() could trigger a divide-by-zero, as it uses div_u64() with a denominator read directly from hardware: the values ropll_hw.sdm_deno, ropll_hw.sdc_deno, ropll_hw.sdc_n, and ropll_hw.sdc_num are populated from PLL registers which, in theory, could be left by the bootloader uninitialized/misconfigured. Provide the necessary sanitization to avoid trusting the hardware state. Reported-by: Sashiko Closes: https://sashiko.dev/#/patchset/20260611-hdptx-clk-fixes-v3-0-67b1b0c00e16@collabora.com?part=1 Fixes: 3481fc04d969 ("phy: rockchip: samsung-hdptx: Compute clk rate from PLL config") Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 710603afff86..8c044381b83a 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -2270,10 +2270,15 @@ static u64 rk_hdptx_phy_clk_calc_rate_from_pll_cfg(struct rk_hdptx_phy *hdptx) fout = PLL_REF_CLK * ropll_hw.pms_mdiv; if (ropll_hw.sdm_en) { + val = 16U * ropll_hw.sdm_deno * + (ropll_hw.sdc_deno * ropll_hw.sdc_n - ropll_hw.sdc_num); + if (!val) { + dev_dbg(hdptx->dev, "%s invalid ROPLL hw state\n", __func__); + return 0; + } + sdm = div_u64(PLL_REF_CLK * ropll_hw.sdc_deno * - ropll_hw.pms_mdiv * ropll_hw.sdm_num, - 16 * ropll_hw.sdm_deno * - (ropll_hw.sdc_deno * ropll_hw.sdc_n - ropll_hw.sdc_num)); + ropll_hw.pms_mdiv * ropll_hw.sdm_num, val); if (ropll_hw.sdm_num_sign) fout = fout - sdm; -- 2.54.0