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Fri, 12 Jun 2026 00:25:52 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: =?UTF-8?q?Gr=C3=A9goire=20Layet?= , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/1] ARM: dts: aspeed: g6: Add AST2600 pwm tacho controller Date: Fri, 12 Jun 2026 07:23:40 +0000 Message-ID: <20260612072341.278591-1-gregoire.layet@9elements.com> X-Mailer: git-send-email 2.51.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It use the existing ast2600-pwm-tach driver. Placed according to bus adresses ordering. Signed-off-by: Grégoire Layet --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index 189bc3bbb47c..818d486b94ac 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -102,6 +102,15 @@ ahbc: bus@1e600000 { reg = <0x1e600000 0x100>; }; + pwm_tach: pwm-tach-controller@1e610000 { + compatible = "aspeed,ast2600-pwm-tach"; + reg = <0x1e610000 0x100>; + clocks = <&syscon ASPEED_CLK_AHB>; + resets = <&syscon ASPEED_RESET_PWM>; + #pwm-cells = <3>; + status = "disabled"; + }; + fmc: spi@1e620000 { reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; #address-cells = <1>; -- 2.51.2