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Remove the wrapper and invoke pdc->enable_intr() from caller. Locking in pdc_enable_intr() applies lock to all pdc->enable_intr() however its only required for pdc_enable_intr_bank() which uses a shared bank across all interrupts. pdc_enable_intr_cfg() do not required locking as IRQ_CFG registers are one per interrupt. Move locking accordingly. Signed-off-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index b9acb0f25c9c..6c556464d37c 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -206,6 +206,8 @@ static void pdc_enable_intr_bank(int pin_out, bool on) index = FIELD_GET(IRQ_ENABLE_BANK_INDEX_MASK, pin_out); mask = FIELD_GET(IRQ_ENABLE_BANK_BIT_MASK, pin_out); + guard(raw_spinlock)(&pdc->lock); + enable = pdc_reg_read(pdc->regs->irq_en_reg, index); __assign_bit(mask, &enable, on); @@ -223,22 +225,15 @@ static void pdc_enable_intr_cfg(int pin_out, bool on) pdc_reg_write(pdc->regs->irq_cfg_reg, pin_out, enable); } -static void pdc_enable_intr(struct irq_data *d, bool on) -{ - guard(raw_spinlock)(&pdc->lock); - - pdc->enable_intr(d->hwirq, on); -} - static void qcom_pdc_gic_disable(struct irq_data *d) { - pdc_enable_intr(d, false); + pdc->enable_intr(d->hwirq, false); irq_chip_disable_parent(d); } static void qcom_pdc_gic_enable(struct irq_data *d) { - pdc_enable_intr(d, true); + pdc->enable_intr(d->hwirq, true); irq_chip_enable_parent(d); } -- 2.43.0