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Tue, 16 Jun 2026 06:03:56 -0700 (PDT) Received: from hu-mchunara-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c42f7c58c3sm134867235ad.23.2026.06.16.06.03.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 06:03:55 -0700 (PDT) From: Monish Chunara To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sarthak Garg , Pradeep Pragallapati , Nitin Rawat , Shiraz Hashim , Monish Chunara Subject: [PATCH V2 0/3] arm64: dts: qcom: Monaco: Enable SDHCI storage support Date: Tue, 16 Jun 2026 18:33:44 +0530 Message-Id: <20260616130347.3096034-1-monish.chunara@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=I/ZVgtgg c=1 sm=1 tr=0 ts=6a3149be cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=972t8ukbrjnbrM4mtFgA:9 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE2MDEzMyBTYWx0ZWRfXzc4HTaW+t7wR sFUiXbkr371yF+lEwWZ/+WY5IFJh6Cgo0g5d6W8DhC3AiKwz+XU+5E70UndJC5wn6Yg6Z36poM9 VsoQCvQFJPOfj396SjJ2+sc1bbN1x10= X-Proofpoint-ORIG-GUID: mSMVoc3YXpcb0z7xXzbEU0vQTTXVSJ4o X-Proofpoint-GUID: mSMVoc3YXpcb0z7xXzbEU0vQTTXVSJ4o X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE2MDEzMyBTYWx0ZWRfX6soTUVMCv6mB BPgxTuK8ZTmGQiLi+DmfonADkO42umWXH/fDjIZyfF2lsQoDk4ReTvKHYNRC9Zor53HopBFaA48 20Lgl6LPGd5YDQeOajLcm/5eB9eeGbnLYSRkMxbSfFoxKfNVXe33yV+criJVSeZHSVQFyXHyz75 +kz9VdrS8bNEORCAjLWITV3oRu/awdT2E60Ruyq1OoRpIcb6Oap9XJjq1rEjM6JTXritPY/rlpr D9QTbwh1IpM53Tq8lyd0MDq7+G8ZkwT1712e1RSVihxKXGEgB5JoaAOneimMRga/wVzzCIzeYNQ q1xMHaUFu2JCuvqOpXw4GlLT9796ebHDdX9fORft4DjiTSogaUrE+APGjDoYdOC8tspclGBDU+4 A5y3eKlzs7zDR+AUAU5gT/stYCKmxscapLXKmqFAH9ebtEUkJ+b6TI6sKsI/vjqYamyuwvQTo04 aFMubmQD86D9tjqpmQg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-16_03,2026-06-15_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 adultscore=0 malwarescore=0 spamscore=0 clxscore=1015 suspectscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606160133 Hello respected Maintainers, This is v2 of the Monaco SDHCI storage support series. V1 was sent here: https://lore.kernel.org/all/20260227105055.2364348-1-monish.chunara@oss.qualcomm.com/ Compared to v1, this revision makes the storage split more explicit and keeps the SoC description generic: - Avoids using the reference to direct supplies as dummy - Updates the eMMC overlay to remove the static UFS host disablement and vreg_l8a voltage override, allowing DT-fixup to manage the UFS-eMMC mutual exclusion dynamically for flexible UFS/eMMC configurations. Validated on Qualcomm Monaco EVK with both SD card and eMMC modules. Monish Chunara (3): arm64: dts: qcom: monaco: Move eMMC CQE support from SoC to board DT arm64: dts: qcom: monaco-evk: Enable SDHCI for SD Card via overlay arm64: dts: qcom: monaco-evk: Add SDHCI support for eMMC via overlay arch/arm64/boot/dts/qcom/Makefile | 7 ++ arch/arm64/boot/dts/qcom/monaco-evk-emmc.dtso | 37 ++++++++++ .../boot/dts/qcom/monaco-evk-sd-card.dtso | 72 +++++++++++++++++++ arch/arm64/boot/dts/qcom/monaco.dtsi | 1 - arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 1 + 5 files changed, 117 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk-emmc.dtso create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk-sd-card.dtso -- 2.34.1