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From: Antonin Malzieu Ridolfi via B4 Relay <devnull+dev.nanonej.com@kernel.org>
To: Danilo Krummrich <dakr@kernel.org>,
	 Alexandre Courbot <acourbot@nvidia.com>,
	Alice Ryhl <aliceryhl@google.com>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>,
	 Antonin Malzieu Ridolfi <dev@nanonej.com>
Cc: linux-kernel@vger.kernel.org, nova-gpu@lists.linux.dev,
	 dri-devel@lists.freedesktop.org, daniel.almeida@collabora.com
Subject: [PATCH 2/5] gpu: nova-core: gsp: Move PBUS register definition
Date: Wed, 17 Jun 2026 01:48:13 +0200	[thread overview]
Message-ID: <20260617-nova-core-regs-split-v1-2-4c7dc4450ea7@nanonej.com> (raw)
In-Reply-To: <20260617-nova-core-regs-split-v1-0-4c7dc4450ea7@nanonej.com>

From: Antonin Malzieu Ridolfi <dev@nanonej.com>

Move PBUS register definition into gsp module and update registers
visibility.

Signed-off-by: Antonin Malzieu Ridolfi <dev@nanonej.com>
---
 drivers/gpu/nova-core/gsp/hal/tu102.rs | 12 ++++++------
 drivers/gpu/nova-core/gsp/regs.rs      | 11 +++++++++++
 drivers/gpu/nova-core/regs.rs          | 11 -----------
 3 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/nova-core/gsp/hal/tu102.rs b/drivers/gpu/nova-core/gsp/hal/tu102.rs
index eb7166148cc9..d46e8ec65785 100644
--- a/drivers/gpu/nova-core/gsp/hal/tu102.rs
+++ b/drivers/gpu/nova-core/gsp/hal/tu102.rs
@@ -37,6 +37,7 @@
             GspHal,
             UnloadBundle, //
         },
+        regs,
         sequencer::{
             GspSequencer,
             GspSequencerParams, //
@@ -44,7 +45,6 @@
         Gsp,
         GspFwWprMeta, //
     },
-    regs,
     vbios::Vbios, //
 };
 
@@ -141,7 +141,7 @@ fn run(
             .inspect_err(|e| dev_err!(dev, "FWSEC-SB failed to run: {:?}\n", e));
 
         // Remove WPR2 region if set.
-        let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);
+        let wpr2_hi = bar.read(crate::regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);
         let booter_unloader_res = (|| {
             if !wpr2_hi.is_wpr2_set() {
                 return Ok(());
@@ -160,7 +160,7 @@ fn run(
             }
 
             // Confirm that the WPR2 region has been removed.
-            let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);
+            let wpr2_hi = bar.read(crate::regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);
             if wpr2_hi.is_wpr2_set() {
                 dev_err!(
                     dev,
@@ -189,7 +189,7 @@ fn run_fwsec_frts(
 ) -> Result {
     // Check that the WPR2 region does not already exist - if it does, we cannot run
     // FWSEC-FRTS until the GPU is reset.
-    if bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound() != 0 {
+    if bar.read(crate::regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound() != 0 {
         dev_err!(
             dev,
             "WPR2 region already exists - GPU needs to be reset to proceed\n"
@@ -234,8 +234,8 @@ fn run_fwsec_frts(
 
     // Check that the WPR2 region has been created as we requested.
     let (wpr2_lo, wpr2_hi) = (
-        bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_LO).lower_bound(),
-        bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound(),
+        bar.read(crate::regs::NV_PFB_PRI_MMU_WPR2_ADDR_LO).lower_bound(),
+        bar.read(crate::regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound(),
     );
 
     match (wpr2_lo, wpr2_hi) {
diff --git a/drivers/gpu/nova-core/gsp/regs.rs b/drivers/gpu/nova-core/gsp/regs.rs
index a76dea3c3ab0..571b7e0a95ee 100644
--- a/drivers/gpu/nova-core/gsp/regs.rs
+++ b/drivers/gpu/nova-core/gsp/regs.rs
@@ -2,6 +2,17 @@
 
 use kernel::io::register;
 
+// PBUS
+
+register! {
+    pub(super) NV_PBUS_SW_SCRATCH(u32)[64] @ 0x00001400 {}
+
+    /// Scratch register 0xe used as FRTS firmware error code.
+    pub(super) NV_PBUS_SW_SCRATCH_0E_FRTS_ERR(u32) => NV_PBUS_SW_SCRATCH[0xe] {
+        31:16   frts_err_code;
+    }
+}
+
 // PGSP
 
 register! {
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 6a86ac05e59f..59d36870b92b 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -105,17 +105,6 @@ fn fmt(&self, f: &mut kernel::fmt::Formatter<'_>) -> kernel::fmt::Result {
     }
 }
 
-// PBUS
-
-register! {
-    pub(crate) NV_PBUS_SW_SCRATCH(u32)[64] @ 0x00001400 {}
-
-    /// Scratch register 0xe used as FRTS firmware error code.
-    pub(crate) NV_PBUS_SW_SCRATCH_0E_FRTS_ERR(u32) => NV_PBUS_SW_SCRATCH[0xe] {
-        31:16   frts_err_code;
-    }
-}
-
 // PFB
 
 register! {

-- 
2.54.0



  parent reply	other threads:[~2026-06-16 23:48 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-16 23:48 [PATCH 0/5] gpu: nova-core: Move registers definitions Antonin Malzieu Ridolfi via B4 Relay
2026-06-16 23:48 ` [PATCH 1/5] gpu: nova-core: fb: Move PDISP register definition Antonin Malzieu Ridolfi via B4 Relay
2026-06-23  6:18   ` Alexandre Courbot
2026-06-16 23:48 ` Antonin Malzieu Ridolfi via B4 Relay [this message]
2026-06-23  6:18   ` [PATCH 2/5] gpu: nova-core: gsp: Move PBUS " Alexandre Courbot
2026-06-16 23:48 ` [PATCH 3/5] gpu: nova-core: falcon: Move PFALCON2 register Antonin Malzieu Ridolfi via B4 Relay
2026-06-23  6:22   ` Alexandre Courbot
2026-06-16 23:48 ` [PATCH 4/5] gpu: nova-core: falcon: Move PRISCV register Antonin Malzieu Ridolfi via B4 Relay
2026-06-16 23:48 ` [PATCH 5/5] gpu: nova-core: falcon: Move PFSP register Antonin Malzieu Ridolfi via B4 Relay

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