From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80467391855; Wed, 17 Jun 2026 08:32:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781685145; cv=none; b=euOwykTWIr22TNTUQuNpM+Q0+nwC6n+IBPw5bsV8uF4soh7JMUzs7GJIUuqCJQU4PkqCEhJo7ecRjgGORPAR3/NK73UUkw1XMQdjdiBROKensI7WcxihKlZdbmtF7ibIiORyHf+BHz5F8CnIiL6hCIKPIsNpDyG2gPve6kdxk+8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781685145; c=relaxed/simple; bh=23ujETeHyNMlyqF2CM9K0eByUZo1COTvzR1UvtGRCR8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NfLYNABqJ4hWLowpGoT8W1X9qukaFE/JA4vy0FOvCxovis13aVdu44bgGjjrpvrI0vdVvKW2UNSOZ1aQq/ee03KiStsQskaXD57ytHXTXCeIQjdcvoCbLzPw9whdGJaCdUnQW6CLpuVWH0TWy19fDlae34owOxpRZFmqQZZbTOg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sYAkEl6o; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sYAkEl6o" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5AFCBC4AF19; Wed, 17 Jun 2026 08:32:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1781685145; bh=23ujETeHyNMlyqF2CM9K0eByUZo1COTvzR1UvtGRCR8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=sYAkEl6o2kpz7x/QV2AuXL07sfuWwo5X5Oc/J4gCYTdkxUTIpzkSR4270/ekMIxvj SLWgV/6ak7ngTpOkAkTBmCCg+pkH29HtsPxlnYxZBfKPWeMOJeUGLu6aM4M+GX/pVx RbNQSLUWYRBDuYy1UmGD4JhBPBfkmBSOw32SciCSKgFRdJN/vrPCTDJFcNe+h30Hyn mjFvJnqp8hiex90AZyKnDlsOb9hI3PqbtSlDooTfp9+R+EbkAt6HplaTd5vSBcLywc QgB8oJQnHQhj96FF/47DbZSrGrI0dPo6DIEio4Z5J2sccIAiamBYDP3po3ehu3swfk +isRJ5+HLr2bA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53707CD98E2; Wed, 17 Jun 2026 08:32:25 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 17 Jun 2026 10:32:26 +0200 Subject: [PATCH v9 8/9] media: qcom: camss: Account for C-PHY when calculating link frequency Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260617-qcom-cphy-v9-8-83da8a8e4e44@ixit.cz> References: <20260617-qcom-cphy-v9-0-83da8a8e4e44@ixit.cz> In-Reply-To: <20260617-qcom-cphy-v9-0-83da8a8e4e44@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain , Hans Verkuil , Nihal Kumar Gupta Cc: Frank Li , Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=7330; i=david@ixit.cz; h=from:subject:message-id; bh=sVPrk/XzjkPG3qz+AM7isEZRhSTJ3CSoEJ0qxo3ZGDs=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqMluWskKMaEo1WlNRlhWXvXJSKd+iTgwshfsXv fTM0ZaTQ4mJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCajJblgAKCRBgAj/E00kg cr/dD/0RD4yoUY54H01nfdFpqaKSsaXSEbWNTZvXc1h7epoi00k5AJwjNily2RWv2cDNsWqEunD MaYpxNu31zVwxyfNUtd5SaCbGv8yrc/3lC3ripvYS14txWOfu3QnVw2ryfJ2JJmjp52yDbI7jyO hvF6AE4wh0kO6Q5pn60awScta8sbrWPT4K22MaYSEhtHrdWgVwTr+N4mgNUbV5suRpPNIQUEeU8 6az40ndkfAvJkpfyX/J13hPFgzGZjrGUGNHzPv0QuIbZPNoU9OOn6p3+182ZYDIUGOYbvM+hOoG cl94/N5KJipW3uhbK40XvF/L5k0JxKwsglO6+WdFnSsop0dYPa80c+ire8fGUSkMDt+oaK98tSP tLjdChanNjmhNUcATxybPtWXdaWoTQJi+t6CU05PWF6KeW48mWM5qX8bifJrmgR3ujFW5U7KPfr 9xNiE6a8TIj7wmqxmJn66vsQLvtcwdZ+goZ5VSz/I8dJyTPQlcVzZH8RzmEuMBmeKJP6sVWygV0 mOyAi5vlp0ICfQY3KD73tIxHIzV745HuxvVoAqZ0esFVRK2jimdrMd6FcVhJkB58BSzK6Vzg6n1 sGvpUosKUcSRVDBUzjrHjtA5VREIuzS7aAYlNJ5/jDJXZdnjM3LzrtqGVyi9K6O6VgGVcut/uQA G2ZAAB3BHiRKIMA== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Ensure that the link frequency divider correctly accounts for C-PHY operation. The divider differs between D-PHY and C-PHY, as described in the MIPI CSI-2 specification. For more details, see: https://docs.kernel.org/driver-api/media/tx-rx.html#pixel-rate Suggested-by: Sakari Ailus Link: https://docs.kernel.org/driver-api/media/tx-rx.html#pixel-rate Signed-off-by: David Heidelberg --- drivers/media/platform/qcom/camss/camss-csid.c | 6 ++++-- drivers/media/platform/qcom/camss/camss-csiphy.c | 6 ++++-- drivers/media/platform/qcom/camss/camss.c | 15 +++++++++++++-- drivers/media/platform/qcom/camss/camss.h | 2 +- 4 files changed, 22 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index bcc34ac9dd212..c8cb6f1a3d3bc 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -535,24 +535,26 @@ const struct csid_format_info *csid_get_fmt_entry(const struct csid_format_info /* * csid_set_clock_rates - Calculate and set clock rates on CSID module * @csiphy: CSID device */ static int csid_set_clock_rates(struct csid_device *csid) { struct device *dev = csid->camss->dev; const struct csid_format_info *fmt; + const bool cphy = (csid->phy.phy_sel == CSID_PHY_SEL_CPHY); + s64 link_freq; int i, j; int ret; fmt = csid_get_fmt_entry(csid->res->formats->formats, csid->res->formats->nformats, csid->fmt[MSM_CSIPHY_PAD_SINK].code); - link_freq = camss_get_link_freq(&csid->subdev.entity, fmt->bpp, - csid->phy.lane_cnt); + + link_freq = camss_get_link_freq(&csid->subdev.entity, fmt->bpp, csid->phy.lane_cnt, cphy); if (link_freq < 0) link_freq = 0; for (i = 0; i < csid->nclocks; i++) { struct camss_clock *clock = &csid->clock[i]; if (!strcmp(clock->name, "csi0") || !strcmp(clock->name, "csi1") || diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index 539ac4888b608..a136cd27880a6 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -139,18 +139,19 @@ static int csiphy_set_clock_rates(struct csiphy_device *csiphy) struct device *dev = csiphy->camss->dev; s64 link_freq; int i, j; int ret; u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats, csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; + const bool cphy = (csiphy->cfg.csi2->lane_cfg.phy_cfg == V4L2_MBUS_CSI2_CPHY); - link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes, cphy); if (link_freq < 0) link_freq = 0; for (i = 0; i < csiphy->nclocks; i++) { struct camss_clock *clock = &csiphy->clock[i]; if (csiphy->rate_set[i]) { u64 min_rate = link_freq / 4; @@ -265,19 +266,20 @@ static int csiphy_set_power(struct v4l2_subdev *sd, int on) static int csiphy_stream_on(struct csiphy_device *csiphy) { struct csiphy_config *cfg = &csiphy->cfg; s64 link_freq; u8 lane_mask = csiphy->res->hw_ops->get_lane_mask(&cfg->csi2->lane_cfg); u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats, csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data; + const bool cphy = (csiphy->cfg.csi2->lane_cfg.phy_cfg == V4L2_MBUS_CSI2_CPHY); u8 val; - link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes, cphy); if (link_freq < 0) { dev_err(csiphy->camss->dev, "Cannot get CSI2 transmitter's link frequency\n"); return -EINVAL; } if (csiphy->base_clk_mux) { diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 072c428e25166..66171069057f8 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -27,16 +27,24 @@ #include #include #include "camss.h" #define CAMSS_CLOCK_MARGIN_NUMERATOR 105 #define CAMSS_CLOCK_MARGIN_DENOMINATOR 100 +/* + * C-PHY encodes data by 16/7 ~ 2.28 bits/symbol + * D-PHY doesn't encode data, thus 16/16 = 1 b/s + */ +#define CAMSS_COMMON_PHY_DIVIDENT 16 +#define CAMSS_CPHY_DIVISOR 7 +#define CAMSS_DPHY_DIVISOR 16 + static const struct parent_dev_ops vfe_parent_dev_ops; static const struct camss_subdev_resources csiphy_res_8x16[] = { /* CSIPHY0 */ { .regulators = {}, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, .clock_rate = { { 0 }, @@ -4619,29 +4627,32 @@ struct media_pad *camss_find_sensor_pad(struct media_entity *entity) } } /** * camss_get_link_freq - Get link frequency from sensor * @entity: Media entity in the current pipeline * @bpp: Number of bits per pixel for the current format * @lanes: Number of lanes in the link to the sensor + * @cphy: If C-PHY encoding is used. * * Return link frequency on success or a negative error code otherwise */ s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, - unsigned int lanes) + unsigned int lanes, const bool cphy) { struct media_pad *sensor_pad; + unsigned int div = lanes * 2 * (cphy ? CAMSS_CPHY_DIVISOR : + CAMSS_DPHY_DIVISOR); sensor_pad = camss_find_sensor_pad(entity); if (!sensor_pad) return -ENODEV; - return v4l2_get_link_freq(sensor_pad, bpp, 2 * lanes); + return v4l2_get_link_freq(sensor_pad, CAMSS_COMMON_PHY_DIVIDENT * bpp, div); } /* * camss_get_pixel_clock - Get pixel clock rate from sensor * @entity: Media entity in the current pipeline * @pixel_clock: Received pixel clock value * * Return 0 on success or a negative error code otherwise diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 93d691c8ac63b..12b14ba8fcec3 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -164,17 +164,17 @@ struct parent_dev_ops { }; void camss_add_clock_margin(u64 *rate); int camss_enable_clocks(int nclocks, struct camss_clock *clock, struct device *dev); void camss_disable_clocks(int nclocks, struct camss_clock *clock); struct media_pad *camss_find_sensor_pad(struct media_entity *entity); s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, - unsigned int lanes); + unsigned int lanes, const bool cphy); int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); int camss_pm_domain_on(struct camss *camss, int id); void camss_pm_domain_off(struct camss *camss, int id); int camss_vfe_get(struct camss *camss, int id); void camss_vfe_put(struct camss *camss, int id); void camss_delete(struct camss *camss); void camss_buf_done(struct camss *camss, int hw_id, int port_id); void camss_reg_update(struct camss *camss, int hw_id, -- 2.53.0