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Wed, 17 Jun 2026 01:15:37 -0700 (PDT) From: Jun Yan To: neil.armstrong@linaro.org Cc: avkrasnov@salutedevices.com, conor+dt@kernel.org, devicetree@vger.kernel.org, jbrunet@baylibre.com, jerrysteve1101@gmail.com, khilman@baylibre.com, krzk+dt@kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, martin.blumenstingl@googlemail.com, robh@kernel.org Subject: Re: [PATCH v2 4/4] arm64: dts: amlogic: meson-axg-s400: Enable pcie_phy Date: Wed, 17 Jun 2026 16:15:31 +0800 Message-ID: <20260617081531.644109-1-jerrysteve1101@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <915e4524-d407-4b4b-9e61-e4a2274a6f6b@linaro.org> References: <915e4524-d407-4b4b-9e61-e4a2274a6f6b@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit > > The meson-axg dtsi now disables pcie_phy by default, so enable it > > for the s400 board to support PCIe functionality. > > > > Signed-off-by: Jun Yan > > --- > > arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > > index 285c6ac1dd61..7ba249cc3d56 100644 > > --- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > > +++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts > > @@ -448,6 +448,10 @@ &pcieB { > > status = "okay"; > > }; > > > > +&pcie_phy { > > + status = "okay"; > > +}; > > + > > &pwm_ab { > > status = "okay"; > > pinctrl-0 = <&pwm_a_x20_pins>; > > Please squash this one with the previous patch Sure, will squash with the prior patch in v3 > > Thanks, > Neil >