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The width selects the bus access size for reads. The mask is ANDed with the raw register value to allow only the entropy-bearing bits through. Update the example to show a typical 8-bit configuration. Update SPDX to dual license to match kernel convention. Drop the misleading '32-bit aligned' constraint from the reg description since alignment now depends on the configured width. Signed-off-by: Jad Keskes --- .../bindings/rng/timeriomem_rng.yaml | 48 +++++++++++++++---- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml index 4754174e9849..636305f211c8 100644 --- a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml +++ b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml @@ -1,10 +1,16 @@ -# SPDX-License-Identifier: GPL-2.0-only +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/rng/timeriomem_rng.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: TimerIO Random Number Generator +title: Timer IOMEM Hardware Random Number Generator + +description: | + This binding covers platforms that have a single IO memory address which + provides periodic random data. The driver reads from the address at a + fixed interval, returning a configurable-width value masked to the desired + bits. maintainers: - Krzysztof Kozlowski @@ -13,9 +19,17 @@ properties: compatible: const: timeriomem_rng + reg: + maxItems: 1 + description: + Base address to sample from. Must be aligned to the configured access + width (1, 2, or 4 bytes) and at least that wide. + period: $ref: /schemas/types.yaml#/definitions/uint32 - description: wait time in microseconds to use between samples + description: + Interval in microseconds between reads. New random data is expected to + be available at this rate. quality: $ref: /schemas/types.yaml#/definitions/uint32 @@ -26,16 +40,26 @@ properties: instead. Note that the default quality is usually zero which disables using this rng to automatically fill the kernel's entropy pool. - reg: - maxItems: 1 + width: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 32 + enum: [8, 16, 32] description: - Base address to sample from. Currently 'reg' must be at least four bytes - wide and 32-bit aligned. + Access width in bits. Determines whether the read is performed as + an 8-bit, 16-bit, or 32-bit bus access. + + mask: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0xFFFFFFFF + description: + Mask applied to the value read from the register. Bits set to 0 in + the mask are cleared in the output data. Default (no mask) passes + all bits through. required: - compatible - - period - reg + - period additionalProperties: false @@ -46,3 +70,11 @@ examples: reg = <0x44 0x04>; period = <1000000>; }; + + rng@64 { + compatible = "timeriomem_rng"; + reg = <0x64 0x01>; + period = <50000>; + width = <8>; + mask = <0xFF>; + }; -- 2.54.0