From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f74.google.com (mail-wr1-f74.google.com [209.85.221.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E94938945A for ; Thu, 18 Jun 2026 12:16:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.74 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781785007; cv=none; b=thG3b+nbRDJGebEI/Jm+oCm7P3Y1nHy0BGtFm/nSf87VdU7xLsYoSH02jhI5W70YeAYpMG7N3MPoHoJjiTA0uuwHJW3bRDbE61hSZVVQTFXUThuoe5AOcv2evsZjUTtxLVJX2dzUdYGqsJ6yBXZVthXLsEqhbOj87+0V/Seajpc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781785007; c=relaxed/simple; bh=3rcFGBZNWTkuWnN08ogbAl7ZwPLkcK4Vdutd9VvI7gA=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=O+TLmCttcDw6Ef+osHkUOTVF2HqnPxWPD0K8KRWU3leaokVBYM3tI+0chwPT1X5L5DNlxAogHMFdn+9DUs6fBCDCLRvGTf4FTj6ps1WCDBOxODdJt5Ysbu1+8BROe8r3sns4dqij5DclRjyGsBkNZ1j4h+Qo9jJQC99qXMGz5aM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--tabba.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=lrR9EUot; arc=none smtp.client-ip=209.85.221.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--tabba.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="lrR9EUot" Received: by mail-wr1-f74.google.com with SMTP id ffacd0b85a97d-4619e150838so432927f8f.3 for ; Thu, 18 Jun 2026 05:16:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1781785005; x=1782389805; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=hXhmL5CRl3+n80jeER5neBIkpa8f6Enzrvf/cmu79ZA=; b=lrR9EUotx3VpxNJcsRRjv7ucYdESUsugpuAOjtwDn/lsoTwVh4PvqEITPYola8EgLB MydSOXODJd0w9nmgfvvUO3Qtqmr7IZBaIiTfN3qx4oxamE1h73s7F2D3jSNW/JEXTpY2 x5+mtD383ZTltne/JQRABbDIwivGR2J68Z0+a2kjyZJeCr5Yixe3JPLEACUbF3b0fba3 ysDT8lHO/Os6UCjIAR3H2935J5g489fWQpv9oXo7EYXB3RbIaPvBAGugU80KowSyJwhY 6FzNA/n1lfMU8zRWi6xfAmdn+VpueSrEwbM7SvM6UkNxgkaJjqxosHEzFuuhF8uOJjGZ m0CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781785005; x=1782389805; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=hXhmL5CRl3+n80jeER5neBIkpa8f6Enzrvf/cmu79ZA=; b=RvBZVPMpQIHYm6qBhoJKzL4oCKvpak9/kVhmL+Ykqn6rMdiZwhGqjgEGArc+RyPYA6 iIDDenbzXq2WZm0dV4VrkEr74Vy0YoOflq9fLoaa7GsbkymEEbii10twCdWE8/IxwgBH a5BRCvQBJAOfCxSCp4o4P7QLKvrFQZyFUi3qGXUdFG+fpOdAQj+ruy0tajLjxqv2eB0Y 9N6eoJUvp7ehlozS6QvnqRFrY7IxYTEiZGtHeqIRIddkZLeuTslCPmGw83h53QkcKqBL rJNeZCUblf80xvneyqU15J7thPogzYGvgDGe1TTn4XAMAt8xYN7Cpaoo/hUO+Xba0kiu epvg== X-Forwarded-Encrypted: i=1; AFNElJ/51YAJ7Ko1hloJ24IIGs1Ye+5bOncaOLSEnXBwi4aXDhV90fznzUaSla9C0fdmgKTBTEsfch2AG+EET5s=@vger.kernel.org X-Gm-Message-State: AOJu0YwFwuHu33CjVsG/ugX4qGhvg+NUalyowzgcWAnxWLknPBhQHGEZ vPIJwavZnaZ753WjsR6U3b8oZ0oifo3pm+JwEstgGtypK6WzzLCv1ZXoFv/+vWL7o2LBg5gZtqQ RSw== X-Received: from wrmd14.prod.google.com ([2002:adf:e88e:0:b0:44b:7bd5:1b9f]) (user=tabba job=prod-delivery.src-stubby-dispatcher) by 2002:a5d:5449:0:b0:45e:de0a:1773 with SMTP id ffacd0b85a97d-462412c71e6mr10667158f8f.33.1781785004608; Thu, 18 Jun 2026 05:16:44 -0700 (PDT) Date: Thu, 18 Jun 2026 13:16:36 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.54.0.1189.g8c84645362-goog Message-ID: <20260618121643.4105064-1-tabba@google.com> Subject: [PATCH v2 0/7] KVM: arm64: Fix missing ESR_ELx.IL in syndrome injection From: Fuad Tabba To: Marc Zyngier , Oliver Upton , Catalin Marinas , Will Deacon , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Vincent Donnefort , Sascha Bischoff , tabba@google.com Content-Type: text/plain; charset="UTF-8" Hi folks, After sashiko caught the missing IL bug [1], I did an audit of all ESR syndrome construction sites in KVM/arm64 as Marc suggested. This series is the result of that audit. The ARM architecture mandates ESR_ELx.IL=1 for several exception classes regardless of instruction length: EC=Unknown, Instruction Aborts, Data Aborts with ISV=0, and SError. For FPAC (EC=0x1C), IL reflects instruction length, but FPAC can only be generated by A64 instructions, so IL must also be 1. Patch 1 is the bug sashiko found: inject_undef64() in the pKVM hyp (EL2) path never set IL. Patch 2 makes the same fix to inject_undef64() in the normal host path, where IL was derived from the triggering trap's instruction length. No instruction that reaches undef injection has a 16-bit encoding, so patch 2 has no functional change today. Patch 3 makes the matching fix to inject_abt64(). Unlike undef injection, abort injection is reachable from a 16-bit T32 instruction (a 32-bit EL0 task under an AArch64 EL1 guest), so the old code there injects an abort with IL=0. Patch 4 fixes the FPAC syndrome constructed during nested ERET emulation, which did not set IL. Patches 5-6 fix SError injection in the emulated and nested paths, neither of which set IL. Patch 7 fixes a fake ESR used to exit to the host. The host does not read IL there, so it is not guest-visible. Changes since v1 [2]: - Patch 4: keep IL by masking it through from the trapped ERET's ESR instead of OR-ing the bit in. The ERET trap (EC=0x1A) always reports IL=1, so this preserves the source syndrome rather than adding the bit unconditionally (Marc). - Rebased on v7.1. Cheers, /fuad [1] https://lore.kernel.org/all/87pl1t8q24.wl-maz@kernel.org/ [2] https://lore.kernel.org/all/20260614163336.3490925-1-tabba@google.com/ Signed-off-by: Fuad Tabba Fuad Tabba (7): KVM: arm64: Set ESR_ELx.IL for injected undefined exceptions at EL2 KVM: arm64: Unconditionally set IL for injected undefined exceptions KVM: arm64: Unconditionally set IL for injected abort exceptions KVM: arm64: Set IL for injected FPAC exceptions during ERET emulation KVM: arm64: Set IL for emulated SError injection KVM: arm64: Set IL for nested SError injection KVM: arm64: Set IL in fake ESR for pKVM memory sharing exit arch/arm64/kvm/emulate-nested.c | 4 ++-- arch/arm64/kvm/hyp/nvhe/pkvm.c | 3 ++- arch/arm64/kvm/hyp/nvhe/sys_regs.c | 2 +- arch/arm64/kvm/inject_fault.c | 18 +++++------------- 4 files changed, 10 insertions(+), 17 deletions(-) -- 2.54.0.1189.g8c84645362-goog