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Thu, 18 Jun 2026 21:54:30 -0700 (PDT) From: Yuanshen Cao Date: Fri, 19 Jun 2026 04:53:31 +0000 Subject: [PATCH 2/5] dmaengine: sun6i-dma: Add set_addr function pointer for variable address widths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260619-sun60i-a733-dma-v1-2-da4b649fc72a@gmail.com> References: <20260619-sun60i-a733-dma-v1-0-da4b649fc72a@gmail.com> In-Reply-To: <20260619-sun60i-a733-dma-v1-0-da4b649fc72a@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yuanshen Cao X-Mailer: b4 0.15.2 The A733 DMA controller supports higher address (up to 32G) compared to previous generations. The existing `sun6i_dma_set_addr` function uses a hardcoded logic for setting the high-address bits in the LLI parameters. By moving `set_addr` into the `sun6i_dma_config` structure, we can provide specialized implementations for different hardware. This allows the A733 to use a version of `set_addr` that correctly handles its specific `SRC_HIGH_ADDR_32G` and `DST_HIGH_ADDR_32G` in the `set_addr` register later in the series. Changes: - Added `set_addr` function pointer to `struct sun6i_dma_config`. - Refactored `sun6i_dma_set_addr` and introduced `sun6i_dma_set_addr_a100` (keeping the logic for high address support). - Updated all existing configuration structs to include the new `set_addr` pointer. - Removed `has_high_addr` since the logic is replaced by `sun6i_dma_set_addr_a100`. Signed-off-by: Yuanshen Cao --- drivers/dma/sun6i-dma.c | 36 ++++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index d92e702320d9..059455425e19 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -112,6 +112,7 @@ /* forward declaration */ struct sun6i_dma_dev; +struct sun6i_dma_lli; /* * Hardware channels / ports representation @@ -138,6 +139,8 @@ struct sun6i_dma_config { void (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst); void (*set_drq)(u32 *p_cfg, s8 src_drq, s8 dst_drq); void (*set_mode)(u32 *p_cfg, s8 src_mode, s8 dst_mode); + void (*set_addr)(struct sun6i_dma_dev *sdev, struct sun6i_dma_lli *v_lli, + dma_addr_t src, dma_addr_t dst); void (*dump_com_regs)(struct sun6i_dma_dev *sdev); u32 (*read_irq_en)(struct sun6i_dma_dev *sdev, u32 chan_num); void (*write_irq_en)(struct sun6i_dma_dev *sdev, u32 chan_num, u32 irq_val); @@ -147,7 +150,6 @@ struct sun6i_dma_config { u32 dst_burst_lengths; u32 src_addr_widths; u32 dst_addr_widths; - bool has_high_addr; bool has_mbus_clk; }; @@ -675,13 +677,20 @@ static int set_config(struct sun6i_dma_dev *sdev, static inline void sun6i_dma_set_addr(struct sun6i_dma_dev *sdev, struct sun6i_dma_lli *v_lli, dma_addr_t src, dma_addr_t dst) +{ + v_lli->src = lower_32_bits(src); + v_lli->dst = lower_32_bits(dst); +} + +static inline void sun6i_dma_set_addr_a100(struct sun6i_dma_dev *sdev, + struct sun6i_dma_lli *v_lli, + dma_addr_t src, dma_addr_t dst) { v_lli->src = lower_32_bits(src); v_lli->dst = lower_32_bits(dst); - if (sdev->cfg->has_high_addr) - v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | - DST_HIGH_ADDR(upper_32_bits(dst)); + v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | + DST_HIGH_ADDR(upper_32_bits(dst)); } static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( @@ -714,7 +723,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( v_lli->len = len; v_lli->para = NORMAL_WAIT; - sun6i_dma_set_addr(sdev, v_lli, src, dest); + sdev->cfg->set_addr(sdev, v_lli, src, dest); burst = convert_burst(8); width = convert_buswidth(DMA_SLAVE_BUSWIDTH_4_BYTES); @@ -773,7 +782,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg( v_lli->para = NORMAL_WAIT; if (dir == DMA_MEM_TO_DEV) { - sun6i_dma_set_addr(sdev, v_lli, + sdev->cfg->set_addr(sdev, v_lli, sg_dma_address(sg), sconfig->dst_addr); v_lli->cfg = lli_cfg; @@ -787,7 +796,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg( sg_dma_len(sg), flags); } else { - sun6i_dma_set_addr(sdev, v_lli, + sdev->cfg->set_addr(sdev, v_lli, sconfig->src_addr, sg_dma_address(sg)); v_lli->cfg = lli_cfg; @@ -858,7 +867,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic( v_lli->para = NORMAL_WAIT; if (dir == DMA_MEM_TO_DEV) { - sun6i_dma_set_addr(sdev, v_lli, + sdev->cfg->set_addr(sdev, v_lli, buf_addr + period_len * i, sconfig->dst_addr); v_lli->cfg = lli_cfg; @@ -870,7 +879,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic( &sconfig->dst_addr, &buf_addr, buf_len, flags); } else { - sun6i_dma_set_addr(sdev, v_lli, + sdev->cfg->set_addr(sdev, v_lli, sconfig->src_addr, buf_addr + period_len * i); v_lli->cfg = lli_cfg; @@ -1148,6 +1157,7 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1176,6 +1186,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1199,6 +1210,7 @@ static struct sun6i_dma_config sun8i_a83t_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1229,6 +1241,7 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1255,6 +1268,7 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1281,6 +1295,7 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_h6, .set_mode = sun6i_set_mode_h6, + .set_addr = sun6i_dma_set_addr_a100, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1296,7 +1311,6 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = { BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), - .has_high_addr = true, .has_mbus_clk = true, }; @@ -1309,6 +1323,7 @@ static struct sun6i_dma_config sun50i_h6_dma_cfg = { .set_burst_length = sun6i_set_burst_length_h3, .set_drq = sun6i_set_drq_h6, .set_mode = sun6i_set_mode_h6, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, @@ -1340,6 +1355,7 @@ static struct sun6i_dma_config sun8i_v3s_dma_cfg = { .set_burst_length = sun6i_set_burst_length_a31, .set_drq = sun6i_set_drq_a31, .set_mode = sun6i_set_mode_a31, + .set_addr = sun6i_dma_set_addr, .dump_com_regs = sun6i_dma_dump_com_regs, .read_irq_en = sun6i_read_irq_en, .write_irq_en = sun6i_write_irq_en, -- 2.54.0