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Reviewed-by: Guoniu Zhou Signed-off-by: Frank Li --- changes in v6 - add Guoniu Zhou's review by changes in v4 - none changes in v3 - replace csi with cpi. changes in v2 - update compatible string to match binding's change --- arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | 13 +++++++++++ arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi | 27 +++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi index a72b2f1c4a1b2..b504f99f6acdb 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi @@ -222,6 +222,19 @@ irqsteer_parallel: irqsteer@58260000 { status = "disabled"; }; + parallel_cpi: cpi@58261000 { + compatible = "fsl,imx8qxp-pcif"; + reg = <0x58261000 0x1000>; + clocks = <&pi0_pxl_lpcg IMX_LPCG_CLK_0>, + <&pi0_ipg_lpcg IMX_LPCG_CLK_4>; + clock-names = "pixel", "ipg"; + assigned-clocks = <&clk IMX_SC_R_PI_0 IMX_SC_PM_CLK_PER>; + assigned-clock-parents = <&clk IMX_SC_R_PI_0_PLL IMX_SC_PM_CLK_PLL>; + assigned-clock-rates = <160000000>; + power-domains = <&pd IMX_SC_R_PI_0>; + status = "disabled"; + }; + pi0_ipg_lpcg: clock-controller@58263004 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x58263004 0x4>; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi index 232cf25dadfcd..5aae15540d6cb 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-img.dtsi @@ -62,6 +62,14 @@ isi_in_2: endpoint { remote-endpoint = <&mipi_csi0_out>; }; }; + + port@4 { + reg = <4>; + + isi_in_4: endpoint { + remote-endpoint = <¶llel_cpi_out>; + }; + }; }; }; @@ -95,3 +103,22 @@ &jpegenc { &mipi_csi_1 { status = "disabled"; }; + +¶llel_cpi { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + parallel_cpi_out: endpoint { + remote-endpoint = <&isi_in_4>; + }; + }; + }; +}; -- 2.43.0