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Thu, 25 Jun 2026 13:14:06 +0000 (GMT) Received: from fedora (unknown [9.5.7.39]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTPS; Thu, 25 Jun 2026 13:14:06 +0000 (GMT) Date: Thu, 25 Jun 2026 18:44:09 +0530 From: Amit Machhiwal To: "Christophe Leroy (CS GROUP)" , linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan , Vaibhav Jain , Harsh Prateek Bora , Ritesh Harjani , Anushree Mathur , Gautam Menghani , Nicholas Piggin , Michael Ellerman , stable@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] powerpc/dt_cpu_ftrs: Set CPU_FTR_P11_PVR for Power11 and later processors Message-ID: <20260625184146.6de49c63-67-amachhiw@linux.ibm.com> Mail-Followup-To: "Christophe Leroy (CS GROUP)" , linuxppc-dev@lists.ozlabs.org, Madhavan Srinivasan , Vaibhav Jain , Harsh Prateek Bora , Ritesh Harjani , Anushree Mathur , Gautam Menghani , Nicholas Piggin , Michael Ellerman , stable@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260614173437.26352-1-amachhiw@linux.ibm.com> <56dfa6bf-1eb0-4e27-974b-03f963c5eed1@kernel.org> <20260616115521.79ad9699-39-amachhiw@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260616115521.79ad9699-39-amachhiw@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: kv6FQlySRDKFNYhOu6GEp5VeNkjjMeLK X-Proofpoint-GUID: B9Yv9BDjsEAuMLcK1auWlmEp-F6Swf5O X-Authority-Analysis: v=2.4 cv=Y4XIdBeN c=1 sm=1 tr=0 ts=6a3d29a5 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=9X2PJUVLfxp5_PpBzxQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI1MDExMCBTYWx0ZWRfXzyZjCmX1Fzgo qHC+T7GcfyD0oOSJTMm7XWZUUZ/f+izui8jsLI6fOeYUADa/qkieT0imhOlMhyCPGeV9j1Gq6r2 0Nmuz/qxIu2yOoeKuwpWPEJmGZlSjfyLs3ZryOe85ZCH6+tXkIfJbtdojNyvEN9d5oAhfSc4aTx nmapeeGDj6ouqr7g97UEhpYpcELd1V5tQhqq0Q4jeux86ILHxN5qZgDjW7tl/HnP4SAHeV+KzEJ T2BL8LrMtIOoe9XyYFKs6fODu9/RoL4nGNizq8wl8VC7cbLgYX8AMCt9t+KbjiUI3SYVlwr/TRL fP0+DGqWx7t54LRkhuzZmS2tr3ET/ltuBz34HpZFPxIC4j9En5gBdwCu7P4x91Yuo5q88aWRRdW NTshsNkW96clgZi+Wutm5H0Bg7BGNoULU56VqY0Lo3NUyKy+73MprRCkW4bGFkMFITkZ5hsOBn1 9j8wR30gXx8pcyXde8A== X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI1MDExMCBTYWx0ZWRfX2Wg0K30Z/iWS tMbO4HJ/psgw1162EE+qOPC8fM5BONNYjE2ShYPxZbmvvOx7kszMW0YIsvn93ebhohC8Y5rwD2D QFq+2g8EfYtMTk/cQjW0uGrtHZMNZps= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-25_01,2026-06-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 suspectscore=0 impostorscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606250110 Hi Christophe, > > > diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c > > > index 3af6c06af02f..e5853daa6a48 100644 > > > --- a/arch/powerpc/kernel/dt_cpu_ftrs.c > > > +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c > > > @@ -704,6 +704,15 @@ static void __init cpufeatures_setup_start(u32 isa) > > > if (isa >= ISA_V3_1) { > > > cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_31; > > > cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_1; > > > + > > > + /* > > > + * CPU_FTR_P11_PVR is a kernel-internal flag to identify > > > + * Power11 and later processors. While ISA v3.1 is supported > > > + * by Power10+, this flag specifically indicates Power11+ > > > + * for code that needs to distinguish between P10 and P11. > > > + */ > > > + if (PVR_VER(mfspr(SPRN_PVR)) >= PVR_POWER11) > > > > Are we sure this test will always be correct ? > > > > For instance PVR_PA6T is higher than PVR_POWER11 allthough it is not ISA 3.1 > > > > Wouldn't is be cleaner and safer to just do: > > > > PVR_VER(mfspr(SPRN_PVR)) == PVR_POWER11 > > You're absolutely right to point out the PVR ordering concern. But PA6T > cannot actually reach this path because we're already gated by: > > if (isa >= ISA_V3_1) > > and PA6T does not implement ISA v3.1. > > My rationale for using `>= PVR_POWER11` is that `CPU_FTR_P11_PVR` is > intended to be included for Power11 and later processors, not just > Power11 itself, as it identifies a CPU feature. Using `== PVR_POWER11` > would mean we'd need to revisit this code for every future generation. > > This approach is consistent with existing kernel code. For example, in > arch/powerpc/perf/hv-gpci.c: > > /* sysinfo interface files are only available for power10 and above platforms */ > if (PVR_VER(mfspr(SPRN_PVR)) >= PVR_POWER10) > add_sysinfo_interface_files(); > > Also, I couldn't find any current users of `PVR_PA6T` or `PVR_BE` in the > kernel tree, so there doesn't appear to be a present-day ISA v3.1+ > example where the comparison would misidentify a processor. > > Please let me know your further thoughts on this. Just checking in — did my previous response address your concern, or do you have further comments? Thanks, Amit