From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 79253225775 for ; Fri, 26 Jun 2026 01:28:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782437341; cv=none; b=EeMHmaN1lB56ZVYfedeEUp6BD+3pnF7HjbgDOtU+7xoHgtJTx8OL/ICwFQfaCmwduv7W5ROKml71Pi7eDCaL2tX6Wma/3R1lfkk2hDJltXvMcpcWZxeqm26zOpB4NE9fUdoEPzqKwnzdOow+ppgiZIk2Q2ZYu+jCJpCF5VtsF8Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782437341; c=relaxed/simple; bh=LAjGyH45anWhF4mbgZr6YtXceXC2SIVSd+wfQJBLzek=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=OzUXgbkcvsgenGOD30VVkRUKdigmCw5BVyaaQvn94QwPAw+x2CueuoIU+OiHKSOZeDmuwKMZcOXBBTX9in3tCFyMYEtjsHTELIKG4n5m9JeqpcrFHyd3kzUbHQbfeAfvG4v3RLeZCCpBsAv6D+olgdptoiynlFODGtrUXzorqeU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=LtOm2Slg; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="LtOm2Slg" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EE98222F8; Thu, 25 Jun 2026 18:28:52 -0700 (PDT) Received: from ergosum.cambridge.arm.com (ergosum.cambridge.arm.com [10.2.208.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 417B23F905; Thu, 25 Jun 2026 18:28:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1782437337; bh=LAjGyH45anWhF4mbgZr6YtXceXC2SIVSd+wfQJBLzek=; h=From:To:Cc:Subject:Date:From; b=LtOm2Slg7RHXFbaZ6bGQEtwNAkV2zbruaWUuZ6hU029o8y2W6YtXK6XNY+e36SJQ4 sSrplXcDAXvTfGNoFRwjGgurqvTRvZv1Du0qiv/sn6JEbTLz0FaSHvEvMtQXzbp9TE PW572ylQaXyh1DNqarsMmVoiubr8iiYVl+SUF8yQ= From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , David Hildenbrand , linux-kernel@vger.kernel.org, Ben Hutchings Subject: [PATCH] arm64/mm: Optimize TLB flush in unmap_hotplug_[pmd|pud]_range() Date: Fri, 26 Jun 2026 02:28:45 +0100 Message-Id: <20260626012845.475959-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.30.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit flush_tlb_kernel_range() could flush down an entire block mapping just with a single PAGE_SIZE stride. This capability was being used umapping PMD and PUD based block mappings in unmap_hotplug_[pmd|pud]_range(). But later on the commit 48478b9f7913 ("arm64/mm: Enable batched TLB flush in unmap_hotplug_range()") replaced this PAGE_SIZE stride with [PMD|PUD]_SIZE strides, hence forcing multiple PAGE_SIZE stride based TLB flushes on platforms where TLB range operation is not supported. Revert back to the earlier TLB behaviour along with the required comments that were dropped earlier. Cc: Catalin Marinas Cc: Will Deacon Cc: Ryan Roberts Cc: David Hildenbrand Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reported-by: Ben Hutchings Closes: https://lore.kernel.org/all/b0d5836032ce3135bfc473f6bff791306d086925.camel@decadent.org.uk/ Fixes: 48478b9f7913 ("arm64/mm: Enable batched TLB flush in unmap_hotplug_range()") Signed-off-by: Anshuman Khandual --- arch/arm64/mm/mmu.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 8242f93f05e4..5ff0041f4a5f 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1509,7 +1509,11 @@ static void unmap_hotplug_pmd_range(pud_t *pudp, unsigned long addr, if (free_mapped) { /* CONT blocks are not supported in the vmemmap */ WARN_ON(pmd_cont(pmd)); - flush_tlb_kernel_range(addr, addr + PMD_SIZE); + /* + * One TLBI should be sufficient here as the PMD_SIZE + * range is mapped with a single block entry. + */ + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); free_hotplug_page_range(pmd_page(pmd), PMD_SIZE, altmap); } @@ -1539,7 +1543,11 @@ static void unmap_hotplug_pud_range(p4d_t *p4dp, unsigned long addr, if (pud_leaf(pud)) { pud_clear(pudp); if (free_mapped) { - flush_tlb_kernel_range(addr, addr + PUD_SIZE); + /* + * One TLBI should be sufficient here as the PUD_SIZE + * range is mapped with a single block entry. + */ + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); free_hotplug_page_range(pud_page(pud), PUD_SIZE, altmap); } -- 2.30.2