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Mon, 29 Jun 2026 18:23:34 -0700 (PDT) Received: from ryzen.lan ([2601:644:8000:7a86::e34]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ca382c5c48sm2440165ad.78.2026.06.29.18.23.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jun 2026 18:23:33 -0700 (PDT) From: Rosen Penev To: linux-mtd@lists.infradead.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Microchip (AT91) SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH] mtd: rawnand: atmel: use struct_size Date: Mon, 29 Jun 2026 18:23:32 -0700 Message-ID: <20260630012332.1471829-1-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The comment above makes it clear that this is a single element for legacy handling. Clarify that with struct_size and avoid manual pointer math. Signed-off-by: Rosen Penev --- drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index e7fdf532c5fe..8a19408abb63 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -1799,8 +1799,7 @@ atmel_nand_controller_legacy_add_nands(struct atmel_nand_controller *nc) * Legacy bindings only allow connecting a single NAND with a unique CS * line to the controller. */ - nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs), - GFP_KERNEL); + nand = devm_kzalloc(nc->dev, struct_size(nand, cs, 1), GFP_KERNEL); if (!nand) return -ENOMEM; -- 2.54.0