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Tue, 30 Jun 2026 09:57:19 -0700 (PDT) Received: from hu-mchunara-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13b2a9b425asm12690272c88.0.2026.06.30.09.57.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jun 2026 09:57:19 -0700 (PDT) From: Monish Chunara To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Neil Armstrong , Wesley Cheng , Ulf Hansson , Kernel Team Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-mmc@vger.kernel.org, Nitin Rawat , Pradeep Pragallapati , Komal Bajaj , Monish Chunara , Konrad Dybcio Subject: [PATCH V2 1/2] arm64: dts: qcom: Add SD Card support for Shikra SoC Date: Tue, 30 Jun 2026 22:26:59 +0530 Message-Id: <20260630165700.1886608-2-monish.chunara@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260630165700.1886608-1-monish.chunara@oss.qualcomm.com> References: <20260630165700.1886608-1-monish.chunara@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjMwMDE2MSBTYWx0ZWRfX/EdUw2txidU4 fEj9RafGxKwsfXvLPcDvWaw5LB9v9DZQBXC0ciZY5eHqPA6Y8FuNY0Ab1FmcaSSMXMzxmypGM2g dzrahZ7js+L8OR+g/Of4sIQUqlUwckfjnycGBtVCxNcoJrrmMvVQ3pcmXKKLSmjURONtcJY9a2C pBWt1uTTEjl+rbg+KqyPEz4/kuqjKof97QAv0MDDBsm3ZJABMPoiKOBT/u888zKexpv9nlRBwMZ G2BfctaeJCpHEb2SeWBWYb0GOYL6iAEvwDk0iavsyx4QGK86sT8e8EELgGlKQbj+R/aPTdKqPt/ OS+HE+fhwPBGP1G6Z0mRGKOkIOicqNDGfwt7/trnWnw+/Gzz+soOEG9PgC6GCiAqm8E/K2TASyl xA6+uogKZUCEZYXGiBqZTueWgS66JiZqr8vK+D+EBU8E90Gxj+dyNTHLbJeu4FmRIY2UVqKhTbm y4aXToqLYT3KHMF1Lcw== X-Proofpoint-ORIG-GUID: VAdcu3XsYa7gHRWx1F2q5EyDF4OkMbvZ X-Authority-Analysis: v=2.4 cv=JqbBas4C c=1 sm=1 tr=0 ts=6a43f570 cx=c_pps a=JYo30EpNSr/tUYqK9jHPoA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=LDB5gES_c2OzCmg7MN4A:9 a=Fk4IpSoW4aLDllm1B1p-:22 X-Proofpoint-GUID: VAdcu3XsYa7gHRWx1F2q5EyDF4OkMbvZ X-Proofpoint-Spam-Info: AW1haW4tMjYwNjMwMDE2MSBTYWx0ZWRfX0C4cSbUmCvwF wePmmLTnD4zBPHxFLja/EBSgQ9QgPJCWYpwEOpQXw4cKt+jiZ63LuZCSIOIkIP7SAVZC34PShzT 36Lq1MxlrpE1bMH7Db7G1A77zUoEMHI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-30_04,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 bulkscore=0 adultscore=0 impostorscore=0 suspectscore=0 phishscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606300161 Add support for SD card on Shikra SoC and enable the required pinctrl configurations. Signed-off-by: Monish Chunara --- arch/arm64/boot/dts/qcom/shikra.dtsi | 97 ++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index e67fe047a683..cfdee8a2526e 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -829,6 +829,53 @@ rclk-pins { bias-bus-hold; }; }; + + sdc2_default: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <14>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <14>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <14>; + bias-pull-up; + }; + }; + + sdc2_sleep: sdc2-sleep-state { + clk-pins { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc2_data"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + sdc2_card_det_n: sd-card-det-n-state { + pins = "gpio89"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; pmu@c91000 { @@ -1081,6 +1128,56 @@ opp-384000000 { }; }; + sdhc_2: mmc@4784000 { + compatible = "qcom,shikra-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x4784000 0x0 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", + "pwr_irq"; + + bus-width = <4>; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", + "core", + "xo"; + + qcom,dll-config = <0x0007442c>; + qcom,ddr-config = <0x80040868>; + + iommus = <&apps_smmu 0x0a0 0x0>; + + interconnects = <&system_noc MASTER_SDCC_2 RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, + <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG + &config_noc SLAVE_SDCC_2 RPM_ACTIVE_TAG>; + interconnect-names = "sdhc-ddr", + "cpu-sdhc"; + + power-domains = <&rpmpd RPMPD_VDDCX>; + operating-points-v2 = <&sdhc2_opp_table>; + + status = "disabled"; + + sdhc2_opp_table: opp-table-2 { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + }; + }; + gpi_dma0: dma-controller@4a00000 { compatible = "qcom,shikra-gpi-dma", "qcom,sm6350-gpi-dma"; reg = <0x0 0x04a00000 0x0 0x60000>; -- 2.34.1