From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A25833F5BE3 for ; Wed, 1 Jul 2026 09:42:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782898930; cv=none; b=bEHzCyczwDA/kAWWNrTSUcT8DXERxG7YHN7t/nZLb1XRwYZdmTNw4k1eb4AzSZ7HCEHTd9gHdiwuX5x7Cs3VjDd9X5xOC7FXQEMnjIqWzNZpQlYM1FaAoAIQ/f7tfCOOvCvwsqUkfteBTReJ5XviYKkQsYudG4+dY2Q3Mn5olo8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782898930; c=relaxed/simple; bh=2vV0uYyp5r9BgMOHjlDCPSJ4nNnsL8Dmdf5a8DIhKd4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=KyhBqTUGUAxNOBRQqfSTb2tXXjAYvHQ4ofd9up+JECSUp6vC5J/xJdeRImevNhCEG3BXSZ/e4YUwFhCi2mHCW2DdEHk1sU62zq3jXoz71zu4sB3vQPXcbE3odKUeoLJYPLC0KBh2FBALYRDaeDjp6FGz7kv/m9VdzgB0ZQ1yCZs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=KP0xdo3r; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="KP0xdo3r" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A2C7A22FC; Wed, 1 Jul 2026 02:42:03 -0700 (PDT) Received: from a079125.blr.arm.com (a079125.arm.com [10.164.21.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A24993FAFB; Wed, 1 Jul 2026 02:42:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1782898928; bh=2vV0uYyp5r9BgMOHjlDCPSJ4nNnsL8Dmdf5a8DIhKd4=; h=From:To:Cc:Subject:Date:From; b=KP0xdo3rUjIVuh8KST5fi5RRyC5+IHb1OD7HvejL055sKUHEnA7tlqDPXDX6EbY1M gqKRA5zPeCxWOLoHuJxZHRDaI2o5W32YMDRWXmpy7xpE7ec4vcufmoYtsNZa7sBy5Z 8+b8jXAvKIV4clO4xGDL3HZOzpxwDoxGl51l774Q= From: Linu Cherian To: Catalin Marinas , Will Deacon , Ryan Roberts , Kevin Brodsky , Anshuman Khandual , Suzuki K Poulose , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linu Cherian Subject: [PATCH 0/5] Add BBML3 cpu feature Date: Wed, 1 Jul 2026 15:11:26 +0530 Message-ID: <20260701094131.677636-1-linu.cherian@arm.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Patches 1 and 2 introduces BBML3 cpu feature Patches 3, 4 and 5 adds more cpus to the BBML3 support list, which dont advertise themselves through the standard MMFR2_ID registers. Linu Cherian (5): arm64: cpufeature: Add BBML3 arm64: cpufeature: Detect BBML3 based on MMFR2 ID arm64: cputype: Add Cortex-A520AE definitions arm64: cputype: Add C1-Nano definitions arm64: cpufeature: Extend bbml3 support list arch/arm64/include/asm/cpufeature.h | 6 ++-- arch/arm64/include/asm/cputype.h | 4 +++ arch/arm64/kernel/cpufeature.c | 51 +++++++++++++--------------- arch/arm64/mm/contpte.c | 21 +++++------- arch/arm64/mm/mmu.c | 52 ++++++++++++++--------------- arch/arm64/mm/proc.S | 4 +-- arch/arm64/tools/cpucaps | 2 +- arch/arm64/tools/sysreg | 1 + 8 files changed, 69 insertions(+), 72 deletions(-) -- 2.43.0