From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5D3743F7877 for ; Wed, 1 Jul 2026 09:42:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782898941; cv=none; b=l4ofFflGHYDwt1VAe/xLdnOI88w9N5r2+yvys16UvJihz8fPSFBo8JnujZ5MUMAn4mf2mPGBV3/vF1emgcyaz9gPgpHDu+Y/GJGg3fLMCo1ln7ZapID5w+KXBXTHofereXU7VF+FTmR6SQaBp607wxZPyxuReEyvk3JgihZmTbM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782898941; c=relaxed/simple; bh=+oUbiNCNZ/2xiesnpJnMijMT5yQJfZOvlwLi93kNOFI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r9B6c9OwS5Sp+GiL4/L4Vd714tqlegnn6kQ/QPr3QiYUbLoM+Z+8aIJtHzb36NIjwoY9mjZ26mvfMI5uD7OzF7jpLzC8aUqL82rgiwfx+W8Rh1iSCInzbyIr0YH0VnqobpmUtR6xiTsEsjwM/6CzxADG7f+cvxBVi4lrfzdSr0k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=A38mih5w; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="A38mih5w" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5C30C2309; Wed, 1 Jul 2026 02:42:14 -0700 (PDT) Received: from a079125.blr.arm.com (a079125.arm.com [10.164.21.37]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 656ED3F905; Wed, 1 Jul 2026 02:42:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1782898938; bh=+oUbiNCNZ/2xiesnpJnMijMT5yQJfZOvlwLi93kNOFI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A38mih5wBAlNsvdSuUo5elF56ywR9fyg1y9jRujmOWVbKi6ofrXXptkGDyFyiXjQl hUNRbhX784SIfoFDP4Jmo+TvaPpgDokx5kYIwD/CkgraxDWx/uJ6jQyyRTofhuLSvU ia1Hn4Tph/ViIKbWUWomlaqFuvQzfQCxKrppYZUY= From: Linu Cherian To: Catalin Marinas , Will Deacon , Ryan Roberts , Kevin Brodsky , Anshuman Khandual , Suzuki K Poulose , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linu Cherian Subject: [PATCH 2/5] arm64: cpufeature: Detect BBML3 based on MMFR2 ID Date: Wed, 1 Jul 2026 15:11:28 +0530 Message-ID: <20260701094131.677636-3-linu.cherian@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260701094131.677636-1-linu.cherian@arm.com> References: <20260701094131.677636-1-linu.cherian@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add MMFR2 ID based BBML3 feature detection, so that compliant cpus doesn't need to be added to the midr list. Signed-off-by: Linu Cherian --- arch/arm64/kernel/cpufeature.c | 14 +++++++------- arch/arm64/tools/sysreg | 1 + 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9986eb7b379c..d754b1b7da77 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2133,6 +2133,7 @@ static bool hvhe_possible(const struct arm64_cpu_capabilities *entry, bool cpu_supports_bbml3(void) { + u64 mmfr2; /* CPUs that support BBML3 but dont advertise through MMFR2 ID */ static const struct midr_range supports_bbml3_list[] = { MIDR_REV_RANGE(MIDR_CORTEX_X4, 0, 3, 0xf), @@ -2144,15 +2145,14 @@ bool cpu_supports_bbml3(void) {} }; - if (!is_midr_in_range_list(supports_bbml3_list)) - return false; + if (is_midr_in_range_list(supports_bbml3_list)) + return true; - /* - * We currently ignore the ID_AA64MMFR2_EL1 register, and only care - * about whether the MIDR check passes. - */ + mmfr2 = __read_sysreg_by_encoding(SYS_ID_AA64MMFR2_EL1); + if (SYS_FIELD_GET(ID_AA64MMFR2_EL1, BBM, mmfr2) == ID_AA64MMFR2_EL1_BBM_3) + return true; - return true; + return false; } static bool has_bbml3(const struct arm64_cpu_capabilities *caps, int scope) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index bc1788b1662b..082256ec3bf9 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2259,6 +2259,7 @@ UnsignedEnum 55:52 BBM 0b0000 0 0b0001 1 0b0010 2 + 0b0011 3 EndEnum UnsignedEnum 51:48 TTL 0b0000 NI -- 2.43.0