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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-847cb7933e1sm1003514b3a.26.2026.07.02.01.54.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2026 01:54:54 -0700 (PDT) From: Jie Gan Date: Thu, 02 Jul 2026 16:54:20 +0800 Subject: [PATCH v2 2/2] coresight: tnoc: Fix clock refcount imbalance on platform remove Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260702-fix-clock-refcount-unbalance-v2-2-2383fbb9952e@oss.qualcomm.com> References: <20260702-fix-clock-refcount-unbalance-v2-0-2383fbb9952e@oss.qualcomm.com> In-Reply-To: <20260702-fix-clock-refcount-unbalance-v2-0-2383fbb9952e@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Alexander Shishkin , Anshuman Khandual , Yeoreum Yun , Yuanfang Zhang , Maxime Coquelin , Alexandre Torgue , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Jie Gan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1782982478; l=2754; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=4Fs1C4uICLTweg+DB4xkt+CkKczMp5yN/3q/4y+AiFc=; b=2XzSNBg9oJGtUlNBbUKjeXrNszri4tquvx+19GLkvutbVwlbSK0IBNkNYcgdCgb6r340eQmDd 3vJVtjMMxD1CYwo7ay2I/JcAQo9SOYTQKwpE5uFjXWuXDDgRYs8fm6F X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzAyMDA5MSBTYWx0ZWRfX5VvVds90+o/E OCmOwqckdrBuMc6edgARhHhByaB/q9S71UxhC14UbUCDrcbXrNl0WvgiPhQHWYccNU0/ysSbf3V DcS1pTlM4WYvAanaHCvnRXCislo17tKx7iA+KMqvV/iNJzQ/Awa8OgPyIKcmkRJWP4DrCwt8nS6 Sipg1aeyvHbgYurvwMNooUpO8PEbUkLNBoSJlXEE4ZEeg7b0OUNLyvXhXsu5dPt0rfuKhxgQSaj on3pE8WcfDhIVnfEmuj3djNrN+cqJACc03UAVdqprHuw9610s1DpPewhkOvt7CHvK9GEmbR+FeJ ztxqXxjXPEHh1i0VxgEuGQAqPP9Da0Sd+6ENr/nbqjJpIB7E4I7hYotCBB5X1rBXAfHC59wqqXK W1Lw/7AjPqkkoBm7nTBJvUIbX9jgDL9tVtihOtifdGULma3OrR+4O4u3rslvBNxVu9gHVyZWjWG faBj/kwjmXkOdrRAaAA== X-Authority-Analysis: v=2.4 cv=X8pi7mTe c=1 sm=1 tr=0 ts=6a462760 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=GvhjM3dZ3B1J12qe5RMA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: ipgVJvXhK3NNOmtsF-Oz-2mjYHl_PLe9 X-Proofpoint-ORIG-GUID: ipgVJvXhK3NNOmtsF-Oz-2mjYHl_PLe9 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzAyMDA5MSBTYWx0ZWRfX/nPqTFy3tBDE N9Xz8NrDpU+RxiBb1mQZjXJu7wlIgmJr35sJvUyPu8ntAy2vlFkImZ1VPKiaWb1kEkNf38T1r9B gw2z8Iq4Lc5NemtxYG7cQkTVNki003w= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-02_01,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607020091 coresight_get_enable_clocks() enables the programming clock through devm_clk_get_optional_enabled(), which also registers a devm action to call clk_disable_unprepare() when the driver detaches. After probe, pm_runtime_put() allows the device to suspend and the runtime suspend callback disables the clock. During remove the device is left runtime suspended, so pm_runtime_disable() freezes it with the clock already disabled. The devm cleanup that runs afterwards calls clk_disable_unprepare() a second time, underflowing the clock enable refcount. Resume the device with pm_runtime_get_sync() before tearing it down so the clock is enabled again and balances the devm-managed disable. Then pm_runtime_set_suspended() and pm_runtime_put_noidle() leave the device in a coherent runtime PM state (suspended, usage count balanced) once the devm action has disabled the clock. Fixes: 1abc1b212eff ("coresight: Appropriately disable programming clocks") Signed-off-by: Jie Gan --- drivers/hwtracing/coresight/coresight-tnoc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c index 9e8de4323d28..eddfdcbaa3ec 100644 --- a/drivers/hwtracing/coresight/coresight-tnoc.c +++ b/drivers/hwtracing/coresight/coresight-tnoc.c @@ -282,42 +282,50 @@ static int itnoc_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); int ret; pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); ret = _tnoc_probe(&pdev->dev, res); pm_runtime_put(&pdev->dev); if (ret) pm_runtime_disable(&pdev->dev); return ret; } static void itnoc_remove(struct platform_device *pdev) { struct trace_noc_drvdata *drvdata = platform_get_drvdata(pdev); + /* + * Resume the device so its clocks are enabled again, balancing the + * clk_disable_unprepare() that devm runs when the driver detaches. + * Then mark it suspended and drop the usage count taken here. + */ + pm_runtime_get_sync(&pdev->dev); coresight_unregister(drvdata->csdev); pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); } #ifdef CONFIG_PM static int itnoc_runtime_suspend(struct device *dev) { struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev); clk_disable_unprepare(drvdata->pclk); return 0; } static int itnoc_runtime_resume(struct device *dev) { struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev); return clk_prepare_enable(drvdata->pclk); } #endif -- 2.34.1