From: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: [PATCH v3 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support
Date: Fri, 03 Jul 2026 10:33:48 +0530 [thread overview]
Message-ID: <20260703-apss-clk-v3-2-4785e89a9c58@oss.qualcomm.com> (raw)
In-Reply-To: <20260703-apss-clk-v3-0-4785e89a9c58@oss.qualcomm.com>
The Application Processor Subsystem on the IPQ5210 platform sources
its clock from the Huayra PLL. Add the configuration data necessary
to set it up.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
drivers/clk/qcom/apss-ipq-pll.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index 3a8987fe7008..5653bb5e93f7 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -79,6 +79,18 @@ static const struct alpha_pll_config ipq5018_pll_config = {
.test_ctl_hi_val = 0x00400003,
};
+static const struct alpha_pll_config ipq5210_pll_config = {
+ .l = 0x22,
+ .config_ctl_val = 0x4001075b,
+ .config_ctl_hi_val = 0x6,
+ .early_output_mask = BIT(3),
+ .aux2_output_mask = BIT(2),
+ .aux_output_mask = BIT(1),
+ .main_output_mask = BIT(0),
+ .test_ctl_val = 0x0,
+ .test_ctl_hi_val = 0x400003,
+};
+
/* 1.080 GHz configuration */
static const struct alpha_pll_config ipq5332_pll_config = {
.l = 0x2d,
@@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
.pll_config = &ipq5018_pll_config,
};
+static const struct apss_pll_data ipq5210_pll_data = {
+ .pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA,
+ .pll = &ipq_pll_huayra,
+ .pll_config = &ipq5210_pll_config,
+};
+
static const struct apss_pll_data ipq5332_pll_data = {
.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
.pll = &ipq_pll_stromer_plus,
@@ -207,6 +225,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
static const struct of_device_id apss_ipq_pll_match_table[] = {
{ .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
+ { .compatible = "qcom,ipq5210-a53pll", .data = &ipq5210_pll_data },
{ .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data },
{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data },
{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data },
--
2.34.1
next prev parent reply other threads:[~2026-07-03 5:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 5:03 [PATCH v3 0/2] Add APSS clock driver support for IPQ5210 Varadarajan Narayanan
2026-07-03 5:03 ` [PATCH v3 1/2] dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible Varadarajan Narayanan
2026-07-03 9:23 ` Krzysztof Kozlowski
2026-07-03 5:03 ` Varadarajan Narayanan [this message]
2026-08-03 3:24 ` [PATCH v3 0/2] Add APSS clock driver support for IPQ5210 Bjorn Andersson
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