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([2.196.43.95]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c12b62c4695sm235462866b.44.2026.07.02.23.51.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jul 2026 23:51:36 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, linux-amarula@amarulasolutions.com, francesco.utel@engicam.com, domenico.acri@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 03/16] arm64: dts: st: add power-domains to sdmmc1 on stm32mp251 Date: Fri, 3 Jul 2026 08:48:53 +0200 Message-ID: <20260703065110.1433283-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260703065110.1433283-1-dario.binacchi@amarulasolutions.com> References: <20260703065110.1433283-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The sdmmc1 node was introduced early in the SoC bring-up before power domains were systematically mapped. Add the missing power-domains property to align it with the rest of the peripheral nodes. Signed-off-by: Dario Binacchi --- (no changes since v5) Changes in v5: - Added in version 5. Suggested by Sashiko. arch/arm64/boot/dts/st/stm32mp251.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 9c63fdb5a885..ae36d703532c 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1664,6 +1664,7 @@ sdmmc1: mmc@48220000 { cap-mmc-highspeed; max-frequency = <120000000>; access-controllers = <&rifsc 76>; + power-domains = <&CLUSTER_PD>; status = "disabled"; }; -- 2.43.0