From: Peter Zijlstra <peterz@infradead.org>
To: Andrea Righi <arighi@nvidia.com>
Cc: Christian Loehle <christian.loehle@arm.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
Ingo Molnar <mingo@redhat.com>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Valentin Schneider <vschneid@redhat.com>,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Felix Abecassis <fabecassis@nvidia.com>,
Joel Fernandes <joelagnelf@nvidia.com>,
Phil Auld <pauld@redhat.com>,
linux-kernel@vger.kernel.org,
Julia Lawall <julia.lawall@inria.fr>
Subject: Re: [PATCH] sched/fair: Stabilize idle SMT core selection with asym-capacity
Date: Fri, 3 Jul 2026 18:54:14 +0200 [thread overview]
Message-ID: <20260703165414.GR751831@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <akfMoVRrATQnO8j_@gpd4>
On Fri, Jul 03, 2026 at 04:52:17PM +0200, Andrea Righi wrote:
> As mentioned in my other email, I found a surprising asymmetry on this machine:
> pinning one worker per core to the first SMT siblings gives substantially better
> performance than pinning them to the second siblings, despite firmware
> advertising identical capacity and frequency for both.
Cute, that's something that Power7 also had. That's where
SD_ASYM_PACKING originated from.
next prev parent reply other threads:[~2026-07-03 16:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 15:27 Andrea Righi
2026-07-03 5:51 ` K Prateek Nayak
2026-07-03 9:40 ` Andrea Righi
2026-07-03 10:00 ` Christian Loehle
2026-07-03 14:52 ` Andrea Righi
2026-07-03 16:54 ` Peter Zijlstra [this message]
2026-07-03 17:07 ` Andrea Righi
2026-07-06 11:40 ` Christian Loehle
2026-07-06 16:46 ` Andrea Righi
2026-07-03 11:20 ` Julia Lawall
2026-07-03 14:38 ` Andrea Righi
2026-07-03 12:33 ` Andrea Righi
2026-07-03 12:51 ` Julia Lawall
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